M30878FJGP#U3 Renesas Electronics America, M30878FJGP#U3 Datasheet - Page 435
M30878FJGP#U3
Manufacturer Part Number
M30878FJGP#U3
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M30878FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 411 of 587
23.1.4.1
23.1.4.2
23.1.4.3
23.1.4.4
23.1.4.5
23.1.4.6
23.1.4.7
23.1.4.8
When a transmit operation is completed or a received data is stored, bits MBOX3 to MBOX0 indicate the
memory slot number which is used for the operation.
The TRMSUCC bit becomes 1 when a transmit operation is successfully completed.
The TRMSUCC bit becomes 0 when a receive operation is successfully completed.
The RECSUCC bit becomes 1 when a receive operation is successfully completed (regardless of whether a
receive message has been stored in the message slot). When a message transmitted in loopback mode is
received, the TRMSUCC bit becomes 1 and the RECSUCC bit becomes 0.
The RECSUCC bit becomes 0 when a transmit operation is successfully completed.
The TRMSTATE bit becomes 1 when the CAN module is operating as a transmit node.
The TRMSTATE bit becomes 0 when the CAN module is in a bus-idle state or starts operating as a receive
node.
The RECSTATE bit becomes 1 when the CAN module is operating as a receive node.
The RECSTATE bit becomes 0 when the CAN module is in a bus-idle state or starts operating as a transmit
node.
After both the RESET1 and RESET0 bits are set to 1 (CAN module is reset), the STATE_RESET bit becomes
1 as soon as the CAN module reset is completed.
The STATE_RESET bit becomes 0 when both the RESET1 and RESET0 bits are set to 0 (CAN module is out
of reset).
The STATE_ LOOPBACK bit is 1 while the CAN module is operating in loopback mode.
The STATE_LOOPBACK bit becomes 1 when the LOOPBACK bit in the CiCTLR0 register is set to 1 (loop
back function enabled).
The STATE_LOOPBACK bit becomes 0 when the LOOPBACK bit is set to 0 (loop back function disabled).
The STATE_BASICCAN bit is 1 while the CAN module is operating in BasicCAN mode. Refer to 23.1.1.3
BASICCAN Bit for information about BasicCAN mode.
The STATE_BASICCAN bit becomes 0 when the BASICCAN bit is set to 0 (BasicCAN mode function
disabled).
The STATE_BASICCAN bit becomes 1 when the BASICCAN bit is set to 1 (BasicCAN mode function
enabled) and registers CiMCTL14 and CiMCTL15 are set to receive a data frame.
MBOX3 to MBOX0 Bits
TRMSUCC Bit
RECSUCC Bit
TRMSTATE Bit
RECSTATE Bit
STATE_RESET Bit
STATE_LOOPBACK Bit
STATE_BASICCAN Bit
23. CAN Module
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