M30878FJGP#U3 Renesas Electronics America, M30878FJGP#U3 Datasheet - Page 262
M30878FJGP#U3
Manufacturer Part Number
M30878FJGP#U3
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M30878FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 238 of 587
Figure 17.19
i = 0 to 4
The above applies under the following conditions:
NOTES:
Example of the receive operation timing (1 stop bit)
RXDi input
Clock divided by UiBRG
register
Internal receive clock
IR bit in the SiRIC register
RI bit in the UiC1 register
RTSi output
- UiMR register: STPS bit = 0 (1 stop bit)
- UiC0 register: CRS bit = 1 (CTS function not used)
1. RXDi input is sampled using the clock divided by the setting value of the UiBRG register. The internal receive
2. When "L" is detected, the receive operation continues. When "H" is detected, the receive operation is cancelled.
clock is generated after detecting the falling edge of the start bit, and then the receive operation starts.
When the receive operatin is cancelled, the RTSi output becomes "L".
Receive Operation in UART Mode
“H”
“L”
“H”
“L”
1
0
1
0
The output signal becomes "L"
when the RE bit in the UiC1 register
is set to 1
(note 1)
The output signal becomes "H"
when the receive operation starts
Start bit
Verify the level
(note 2)
D0
Input the
receive data
This bit becomes 1 when the data is transferred
from UARTi receive shift register to UiRB register
17. Serial Interfaces (UART0 to UART4)
The RI bit becomes 0 and RTSi output
becomes "L" by reading the UiRB register
Set to 0 by an interrupt request
acknowledgement or by a program
Stop bit
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