M30879FLFP#U3 Renesas Electronics America, M30879FLFP#U3 Datasheet - Page 199
![IC M32C/87 MCU FLASH 100QFP](/photos/12/31/123127/m30879flfp_u3_sml.jpg)
M30879FLFP#U3
Manufacturer Part Number
M30879FLFP#U3
Description
IC M32C/87 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(93 pages)
2.M3087BFLGPU3.pdf
(629 pages)
3.M3087BFLGPU3.pdf
(364 pages)
Specifications of M30879FLFP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Chapter 4
*1 For indirect instruction addressing, the following number is
[ Number of Bytes/Number of Cycles ]
*2 When src or dest is indirectly addressed, the number of bytes and cycles in the table are increased by 1 and 3
b7
1 .
0
Rn
An
[An]
dsp:8[An]
src
Rn
An
[An]
dsp:8[An]
dsp:8[SB/FB]
dsp:16[An]
dsp:16[SB/FB] 4/4
dsp:24[An]
abs16
abs24
1 s4 s3 s2 d4 d3 d2 1 d1 d0 s1 s0 0
9
0 .
B
added at the beginning of code:
respectively. Also, when src and dest both are indirectly addressed, the number of bytes and cycles in the table are
increased by 1 and 6, respectively.
0
0
3
01000001 when src is indirectly addressed
00001001 when dest is indirectly addressed
01001001 when src and dest are indirectly addressed
1
2
9
0
0 -
0
6
dest Rn
1
0 .
0
src/dest
0
5
3 .
Instruction Code/Number of Cycles
1
2/2
2/2
2/4
3/4
3/4
4/4
5/4
4/4
5/4
---/---/R2R0
---/---/R3R1
---/---/-
---/---/-
A0
A1
[A0]
[A1]
dsp:8[A0]
dsp:8[A1]
p
a
g
2/2
2/2
2/4
3/4
3/4
4/4
4/4
5/4
4/4
5/4
An [An] dsp:8[An] dsp:8[SB/FB] dsp:16[An] dsp:16[SB/FB] dsp:24[An] abs16 abs24
e
src, dest
b0 b7
181
2/4
2/4
2/6
3/6
3/6
4/6
4/6
5/6
4/6
5/6
f o
3
s4 s3 s2 s1 s0
d4 d3 d2 d1 d0
1 0 0 1 0
1 0 0 1 1
- - - - - - - -
- - - - - - - -
0 0 0 1 0
0 0 0 1 1
0 0 0 0 0
0 0 0 0 1
0 0 1 0 0
0 0 1 0 1
3
3/4
3/4
3/6
4/6
4/6
5/6
5/6
6/6
5/6
6/6
5
0
3/4
3/4
3/6
4/6
4/6
5/6
5/6
6/6
5/6
6/6
dsp:8[SB/FB]
dsp:16[An]
dsp:16[SB/FB]
dsp:24[An]
abs16
abs24
1
0
b0
src/dest
(
4/4
4/4
4/6
5/6
5/6
6/6
6/6
7/6
6/6
7/6
dsp16/abs16
dsp8
dsp:8[SB]
dsp:8[FB]
dsp:16[A0]
dsp:16[A1]
dsp:16[SB]
dsp:16[FB]
dsp:24[A0]
dsp:24[A1]
abs16
abs24
dsp24/abs24
4.2 Instruction Code/Number of Cycles
src code
4/4
4/4
4/6
5/6
5/6
6/6
6/6
7/6
6/6
7/6
s4 s3 s2 s1 s0
d4 d3 d2 d1 d0
0 0 1 1 0
0 0 1 1 1
0 1 0 0 0
0 1 0 0 1
0 1 0 1 0
0 1 0 1 1
0 1 1 0 0
0 1 1 0 1
0 1 1 1 1
0 1 1 1 0
)
(
5/4
5/4
5/6
6/6
6/6
7/6
7/6
8/6
7/6
8/6
dsp8
dsp16/abs16
dsp24/abs24
dest code
4/6
6/6
6/6
7/6
4/4
4/4
5/6
5/6
6/6
7/6
ADD
5/4
5/4
5/6
6/6
6/6
7/6
7/6
8/6
7/6
8/6
)
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