MPC555LFCZP40 Freescale Semiconductor, MPC555LFCZP40 Datasheet - Page 2

• Manufacturer Part Number: MPC555LFCZP40
• Description: IC MPU 32BIT 40MHZ 272-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC555LFCZP40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 101
• Program Memory Size: 448KB (448K x 8)
• Program Memory Type: FLASH
• Ram Size: 26K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 272-PBGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 26 KB
• Interface Type: CAN, QSPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 101
• Operating Supply Voltage: 3.3 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPC555CMEE
• Minimum Operating Temperature: - 85 C
• On-chip Adc: 10 bit, 32 Channel
• For Use With: MPC555CMEE - KIT EVAL FOR MPC555
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Block Diagram
1.1
Figure 1 is a block diagram of the MPC555.
1.2
The MPC555 key features are explained in the following sections.
1.2.1
2
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•
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Extensive system development support
— On-chip watchpoints and breakpoints
— Program flow tracking
— BDM on-chip emulation development interface
Works with SRAM, EPROM, Flash EEPROM, and other peripherals
Byte write enables
32-bit address decodes with bit masks
Block Diagram
Key Features
RCPU
Four-Bank Memory Controller
TPU3
QADC
DPTRAM
QADC
Freescale Semiconductor, Inc.
16 Kbytes
SRAM
For More Information On This Product,
Interface
Burst
Figure 1. MPC555 Block Diagram
QSMCM
TPU3
L-bus
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MPC555 Product Brief
10 Kbytes
256 Kbytes
SRAM
Flash
TouCAN
TouCAN
MIOS1
192 Kbytes
L2U
Flash
U-bus
UIMB
USIU
IMB3
E-bus