ATTINY10-MAHR Atmel, ATTINY10-MAHR Datasheet - Page 15

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ATTINY10-MAHR

Manufacturer Part Number
ATTINY10-MAHR
Description
MCU AVR 1024K FLASH 12MHZ 8UDFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY10-MAHR

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Peripherals
POR, PWM, WDT
Number Of I /o
4
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Ram Size
32 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
ATTINY10-MAH
ATTINY10-MAH
5.2.1
8127D–AVR–02/10
Data Memory Access Times
Figure 5-1.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
Figure 5-2.
Address
clk
Data Memory Map (Byte Addressing)
On-chip Data SRAM Access Cycles
FLASH PROGRAM MEMORY
Data
Data
WR
CPU
RD
CONFIGURATION BITS
SRAM DATA MEMORY
CALIBRATION BITS
NVM LOCK BITS
DEVICE ID BITS
I/O SPACE
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
(reserved)
Compute Address
T1
Memory Access Instruction
Address valid
0x0000 ... 0x003F
0x0040 ... 0x005F
0x0060 ... 0x3EFF
0x3F00 ... 0x3F01
0x3F02 ... 0x3F3F
0x3F40 ... 0x3F41
0x3F42 ... 0x3F7F
0x3F80 ... 0x3F81
0x3F82 ... 0x3FBF
0x3FC0 ... 0x3FC3
0x3FC4 ... 0x3FFF
0x4000 ... 0x41FF/0x43FF
0x4400 ... 0xFFFF
CPU
T2
cycles as described in
Next Instruction
ATtiny4/5/9/10
T3
Figure
5-2.
15

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