ATTINY10-MAHR Atmel, ATTINY10-MAHR Datasheet - Page 71
ATTINY10-MAHR
Manufacturer Part Number
ATTINY10-MAHR
Description
MCU AVR 1024K FLASH 12MHZ 8UDFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY10-MAHR
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Peripherals
POR, PWM, WDT
Number Of I /o
4
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Ram Size
32 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Other names
ATTINY10-MAH
ATTINY10-MAH
ATTINY10-MAH
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8127D–AVR–02/10
Figure 11-13 on page 71
Figure 11-13. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f
Figure 11-14 on page 71
using phase and frequency correct PWM mode the OCR0x Register is updated at BOTTOM.
The timing diagrams will be the same, but TOP should be replaced by BOTTOM, TOP-1 by
BOTTOM+1 and so on. The same renaming applies for modes that set the TOV0 flag at
BOTTOM.
Figure 11-14. Timer/Counter Timing Diagram, no Prescaling
Figure 11-15 on page 72
(PC and PFC PWM)
TCNTn
OCRnx
OCFnx
(clk
and ICFn
(CTC and FPWM)
clk
(Update at TOP)
clk
TOVn
I/O
I/O
Tn
TCNTn
TCNTn
OCRnx
as TOP)
(clk
/8)
clk
clk
I/O
(FPWM)
I/O
Tn
/1)
(if used
OCRnx - 1
shows the same timing data, but with the prescaler enabled.
shows the same timing data, but with the prescaler enabled.
TOP - 1
TOP - 1
shows the count sequence close to TOP in various modes. When
Old OCRnx Value
OCRnx
OCRnx Value
TOP
TOP
OCRnx + 1
BOTTOM
TOP - 1
New OCRnx Value
ATtiny4/5/9/10
BOTTOM + 1
OCRnx + 2
clk_I/O
TOP - 2
/8)
71
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