ATTINY20-SSU Atmel, ATTINY20-SSU Datasheet - Page 71

• Manufacturer Part Number: ATTINY20-SSU
• Description: MCU AVR 2KB FLASH 12MHZ 14SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY20-SSU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Processor Series: ATtiny
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI, TWI
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.9
11.9.1
8235B–AVR–04/11
Register Description
TCCR0A – Timer/Counter Control Register A
Figure 11-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
• Bits 7:6 – COM0A[1:0] : Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A[1:0]
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC0A pin
must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A[1:0] bits depends on the
WGM0[2:0] bit setting.
bits are set to a normal or CTC mode (non-PWM).
Table 11-2.
Table 11-3
TCNTn
(clk
(CTC)
OCRnx
OCFnx
Bit
0x19
Read/Write
Initial Value
clk
clk
COM0A1
I/O
I/O
Tn
/8)
0
0
1
1
shows COM0A[1:0] bit functionality when WGM0[2:0] bits are set to fast PWM mode.
caler (f
COM0A1
Compare Output Mode, non-PWM Mode
R/W
COM0A0
7
0
0
1
0
1
clk_I/O
TOP - 1
Table 11-2
COM0A0
R/W
/8)
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
COM0B1
shows the COM0A[1:0] bit functionality when the WGM0[2:0]
R/W
5
0
COM0B0
TOP
R/W
4
0
TOP
3
–
R
0
BOTTOM
R
2
–
0
WGM01
R/W
1
0
WGM00
ATtiny20
R/W
0
0
BOTTOM + 1
TCCR0A
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