PIC12F609-I/MF Microchip Technology, PIC12F609-I/MF Datasheet - Page 45
PIC12F609-I/MF
Manufacturer Part Number
PIC12F609-I/MF
Description
IC PIC MCU FLASH 1KX14 8-DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(8 pages)
3.PIC12F609T-ISN.pdf
(26 pages)
4.PIC12F609T-ISN.pdf
(8 pages)
5.PIC12F615-EMF.pdf
(196 pages)
Specifications of PIC12F609-I/MF
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
5
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC12F609T-ISN PDF datasheet #4
- PIC12F615-EMF PDF datasheet #5
- Current page: 45 of 196
- Download datasheet (3Mb)
REGISTER 5-1:
TABLE 5-1:
© 2008 Microchip Technology Inc.
TMR0
INTCON
OPTION_REG
TRISIO
Legend:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R/W-1
GPPU
Name
– = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Timer0
module.
GPPU: GPIO Pull-up Enable bit
1 = GPIO pull-ups are disabled
0 = GPIO pull-ups are enabled by individual PORT latch values in WPU register
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (F
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
Timer0 Module Register
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
GPPU
INTEDG
Bit 7
GIE
R/W-1
—
OPTION_REG: OPTION REGISTER
BIT VALUE
INTEDG
PEIE
Bit 6
000
001
010
011
100
101
110
111
—
W = Writable bit
‘1’ = Bit is set
R/W-1
T0CS
TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0 --11 1111
T0CS
TMR0 RATE
Bit 5
T0IE
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
PIC12F609/615/12HV609/615
T0SE
Bit 4
INTE
R/W-1
T0SE
WDT RATE
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
OSC
GPIE
Bit 3
PSA
/4)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
PSA
Bit 2
T0IF
PS2
Bit 1
INTF
PS1
R/W-1
PS2
GPIF
Bit 0
PS0
x = Bit is unknown
xxxx xxxx
0000 000x
1111 1111
POR, BOR
R/W-1
Value on
PS1
DS41302B-page 43
uuuu uuuu
0000 000x
1111 1111
--11 1111
Value on
all other
R/W-1
Resets
PS0
bit 0
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