PIC12F609-I/MF Microchip Technology, PIC12F609-I/MF Datasheet - Page 57

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PIC12F609-I/MF

Manufacturer Part Number
PIC12F609-I/MF
Description
IC PIC MCU FLASH 1KX14 8-DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F609-I/MF

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
5
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.0
The comparator can be used to interface analog
circuits to a digital circuit by comparing two analog
voltages and providing a digital indication of their
relative magnitudes. The comparator is a very useful
mixed signal building block because it provides analog
functionality independent of the program execution.
The Analog Comparator module includes the following
features:
• Programmable input section
• Comparator output is available internally/externally
• Programmable output polarity
• Interrupt-on-change
• Wake-up from Sleep
• PWM shutdown
• Timer1 gate (count enable)
• Output synchronization to Timer1 clock input
• Programmable voltage reference
• User-enable Comparator Hysteresis
8.1
The comparator is shown in Figure 8-1 along with the
relationship between the analog input levels and the
digital output. When the analog voltage at V
FIGURE 8-2:
© 2008 Microchip Technology Inc.
FixedRef
CV
CMV
COMPARATOR MODULE
REF
Comparator Overview
REN
CIN1-
CIN0-
0
1
MUX
CIN+
CMCH
COMPARATOR SIMPLIFIED BLOCK DIAGRAM
CMV
REF
Note 1:
CMR
0
1
0
1
MUX
MUX
2:
3:
4:
When CMON = 0, the comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
Output shown for reference only. See I/O port pin diagram for more details.
CMV
CMV
PIC12F609/615/12HV609/615
IN
+ is less
IN
IN
+
-
CMON
CMPOL
(1)
From Timer1
than the analog voltage at V
parator is a digital low level. When the analog voltage
at V
output of the comparator is a digital high level.
FIGURE 8-1:SINGLE COMPARATOR
Clock
Q3*RD_CMCON0
Output
Note:
IN
+ is greater than the analog voltage at V
Q1
V
V
V
V
IN
IN
IN
IN
D
+
-
-
+
D
EN
Reset
The black areas of the output of the
comparator represents the uncertainty
due to input offsets and response time.
Q
Q
CMSYNC
D
EN
CMPOL
CL
0
1
MUX
Q
+
To PWM Auto-Shutdown
OSC
IN
-, the output of the com-
).
SYNCCMOUT
To Timer1 Gate
RD_CMCON0
CMOE
DS41302B-page 55
Set CMIF
Data Bus
Output
COUT
To
(4)
IN
-, the

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