PIC16F630T-I/ST Microchip Technology, PIC16F630T-I/ST Datasheet - Page 32

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PIC16F630T-I/ST

Manufacturer Part Number
PIC16F630T-I/ST
Description
IC MCU FLASH 1KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F630T-I/ST

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
PIC16F630/676
4.3
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI, with the internal phase clocks, is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks. Therefore, it is
necessary for T0CKI to be high for at least 2T
REGISTER 4-1:
DS40039F-page 32
Using Timer0 with an External
Clock
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
OPTION_REG — OPTION REGISTER (ADDRESS: 81h)
bit 7
RAPU: PORTA Pull-up Enable bit
1 = PORTA pull-ups are disabled
0 = PORTA pull-ups are enabled by individual PORT latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RA2/INT pin
0 = Interrupt on falling edge of RA2/INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA2/T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA2/T0CKI pin
0 = Increment on low-to-high transition on RA2/T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits
Legend:
R = Readable bit
- n = Value at POR
R/W-1
RAPU
Bit Value TMR0 Rate WDT Rate
000
001
010
011
100
101
110
111
INTEDG
R/W-1
OSC
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
T0CS
(and
W = Writable bit
‘1’ = Bit is set
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
R/W-1
T0SE
a small RC delay of 20 ns) and low for at least 2T
(and a small RC delay of 20 ns). Refer to the electrical
specification of the desired device.
Note:
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PSA
The ANSEL (91h) and CMCON (19h)
registers must be initialized to configure an
analog channel as a digital input. Pins
configured as analog inputs will read ‘
The ANSEL register is defined for the
PIC16F676.
R/W-1
PS2
 2010 Microchip Technology Inc.
x = Bit is unknown
R/W-1
PS1
R/W-1
PS0
bit 0
OSC
0
’.

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