PIC16F1826-E/P Microchip Technology, PIC16F1826-E/P Datasheet - Page 115

• Manufacturer Part Number: PIC16F1826-E/P
• Description: MCU PIC 8BIT 2K FLASH 18-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1826-E/P

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Core: PIC
• Processor Series: PIC16F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 32 MHz
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 3.3 mm
• Interface Type: I2C, SPI, UART
• Length: 22.86 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.3 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

11.4
Instead of accessing program memory or EEPROM
data memory, the User ID’s, Device ID/Revision ID and
Configuration
CFGS = 1. This is the region that would be pointed to
by PC<15> = 1, but not all addresses are accessible.
Different access may exist for reads and writes. Refer
to Table 11-1.
TABLE 11-1:
EXAMPLE 11-3:
© 2009 Microchip Technology Inc.
* This code block will read 1 word of program
* memory at the memory address:
*
*
PROG_ADDR_HI: PROG_ADDR_LO
data will be returned in the variables;
PROG_DATA_HI, PROG_DATA_LO
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWL
BCF
BSF
BCF
BSF
NOP
NOP
BSF
MOVF
MOVWF
MOVF
MOVWF
Configuration Word and Device ID
Access
8000h-8003h
8007h-8008h
Address
8006h
EEADRL
PROG_ADDR_LO
EEADRL
PROG_ADDR_HI
EEADRH
EECON1,CFGS
EECON1,EEPGD
INTCON,GIE
EECON1,RD
INTCON,GIE
EEDATL,W
PROG_DATA_LO
EEDATH,W
PROG_DATA_HI
Words
PFM AND FUSE ACCESS VIA EECON1/EEDATH:EEDATL REGISTERS
(WHEN CFGS = 1)
CONFIGURATION WORD AND DEVICE ID ACCESS
can
be
Configuration Words 1 and 2
Device ID/Revision ID
accessed
; Select Bank 2
;
; Store LSB of address
;
; Store MSB of address
; Deselect Configuration Space
; Select Program Memory
; Disable interrupts
; Initiate read
; Executed (Figure 11-1)
; Ignored (Figure 11-1)
; Restore interrupts
; Get LSB of word
; Store in user location
; Get MSB of word
; Store in user location
Function
User IDs
when
Preliminary
When read access is initiated on an unallowed
address, the EEDATH:EEDATL registers are cleared.
Writes can be disabled via the WRT Configuration bits.
Refer to the Configuration Word 2.
Read Access
PIC16F/LF1826/27
Yes
Yes
Yes
Write Access
DS41391B-page 115
Yes
No
No