AT80C51RD2-SLRUM Atmel, AT80C51RD2-SLRUM Datasheet - Page 26

IC MCU 80C51 HI PERFORM 44PLCC

AT80C51RD2-SLRUM

Manufacturer Part Number
AT80C51RD2-SLRUM
Description
IC MCU 80C51 HI PERFORM 44PLCC
Manufacturer
Atmel
Series
80Cr
Datasheet

Specifications of AT80C51RD2-SLRUM

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT80x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Package
44PLCC
Device Core
8051
Family Name
AT80
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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Figure 10-2. PCA Interrupt System
26
AT80C51RD2
PCA Timer/Counter
Module 0
Module 1
Module 2
Module 3
Module 4
CMOD.0
PCA Modules: each one of the five compare/capture modules has six possible functions. It can
perform:
In addition, module 4 can be used as a Watchdog Timer.
Each module in the PCA has a special function register associated with it. These registers are:
CCAPM0 for module 0, CCAPM1 for module 1, etc. (see Table 10-3). The registers contain the
bits that control the mode that each module will operate in.
• 16-bit Capture, positive-edge triggered
• 16-bit Capture, negative-edge triggered
• 16-bit Capture, both positive and negative-edge triggered
• 16-bit Software Timer
• 16-bit High-speed Output
• 8-bit Pulse Width Modulator
• The ECCF bit (CCAPMn.0 where n = 0, 1, 2, 3, or 4 depending on the module) enables the
• PWM (CCAPMn.1) enables the pulse width modulation mode.
• The TOG bit (CCAPMn.2) when set causes the CEX output associated with the module to
• The match bit MAT (CCAPMn.3) when set will cause the CCFn bit in the CCON register to be
• The next two bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5) determine the edge that a
• The last bit in the register ECOM (CCAPMn.6) when set enables the comparator function.
CCF flag in the CCON SFR to generate an interrupt when a match or compare occurs in the
associated module.
toggle when there is a match between the PCA counter and the module's capture/compare
register.
set when there is a match between the PCA counter and the module's capture/compare
register.
capture input will be active on. The CAPN bit enables the negative edge, and the CAPP bit
enables the positive edge. If both bits are set both edges will be enabled and a capture will
occur for either transition.
ECF
CF
ECCFn CCAPMn.0
CR
CCF4 CCF3 CCF2 CCF1 CCF0
IE.6
EC
IE.7
EA
Priority Decoder
CCON
0xD8
To Interrupt
4113D–8051–01/09

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