AT80C51RD2-SLRUM Atmel, AT80C51RD2-SLRUM Datasheet - Page 50

• Manufacturer Part Number: AT80C51RD2-SLRUM
• Description: IC MCU 80C51 HI PERFORM 44PLCC
• Manufacturer: Atmel
• Series: 80Cr

Specifications of AT80C51RD2-SLRUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: AT80x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1280 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 8051
• Family Name: AT80
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

12.2
50
Interrupt Sources and Vector Addresses
AT80C51RD2
IPH1 - Interrupt Priority High Register (B3h)
Reset Value = XXXX XXX0b
Not bit addressable
Table 12-8.
Number
Number
Bit
7
7
6
5
4
3
2
1
0
-
0
1
2
3
4
5
6
7
8
Interrupt Sources and Vector Addresses
Mnemonic Description
Polling Priority
KBDH
Bit
6
-
-
-
-
-
-
-
-
0
1
2
3
4
6
7
5
8
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Keyboard interrupt Priority High bit
KB DHKBDLPriority Level
0
0
1
1
0 Lowest
1
0
1 Highest
5
-
Interrupt Source
Keyboard
Timer 0
Timer 1
Timer 2
Reset
UART
INT0
INT1
PCA
4
-
3
-
CF + CCFn (n = 0-4)
TF2+EXF2
Interrupt
Request
KBDIT
RI+TI
TF0
IE0
IE1
IF1
2
-
1
-
4113D–8051–01/09
Address
Vector
000Bh
001Bh
002Bh
003Bh
0000h
0003h
0013h
0023h
0033h
KBDH
0