PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 35
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PIC16F688-E/ML
Manufacturer Part Number
PIC16F688-E/ML
Description
IC PIC MCU FLASH 4KX14 16QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
Specifications of PIC16F688-E/ML
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Controller Family/series
PIC16F
No. Of I/o's
12
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
2
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, RS- 232, SCI, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Details
4.0
There are as many as twelve general purpose I/O pins
available. Depending on which peripherals are enabled,
some or all of the pins may not be available as general
purpose I/O. In general, when a peripheral is enabled,
the associated pin may not be used as a general
purpose I/O pin.
4.1
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA. Setting
a TRISA bit (= 1) will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in
a High-Impedance mode). Clearing a TRISA bit (= 0)
will make the corresponding PORTA pin an output (i.e.,
put the contents of the output latch on the selected pin).
The exception is RA3, which is input only and its TRISA
bit will always read as ‘1’. Example 4-1 shows how to
initialize PORTA.
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the PORT latch.
All write operations are read-modify-write operations.
REGISTER 4-1:
REGISTER 4-2:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
U-0
U-0
—
—
2:
I/O PORTS
PORTA and the TRISA Registers
TRISA<3> always reads ‘1’.
TRISA<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
Unimplemented: Read as ‘0’
RA<5:0>: PORTA I/O Pin bit
1 = Port pin is > V
0 = Port pin is < V
Unimplemented: Read as ‘0’
TRISA<5:0>: PORTA Tri-State Control bits
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
U-0
U-0
—
—
PORTA: PORTA REGISTER
TRISA: PORTA TRI-STATE REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
IH
IL
TRISA5
R/W-x
R/W-1
RA5
TRISA4
R/W-0
R/W-1
RA4
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
TRISA3
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the
PORT data latch. RA3 reads ‘0’ when MCLRE = 1.
The TRISA register controls the direction of the
PORTA pins, even when they are being used as
analog inputs. The user must ensure the bits in the
TRISA register are maintained set when using them as
analog inputs. I/O pins configured as analog input
always read ‘0’.
EXAMPLE 4-1:
RA3
BANKSEL PORTA
CLRF
MOVLW
MOVWF
BANKSEL ANSEL
CLRF
MOVLW
MOVWF
R-x
R-1
Note:
PORTA
07h
CMCON0
ANSEL
0Ch
TRISA
The ANSEL and CMCON0 registers must
be initialized to configure an analog
channel as a digital input. Pins configured
as analog inputs will read ‘0’.
TRISA2
R/W-0
R/W-1
RA2
INITIALIZING PORTA
x = Bit is unknown
x = Bit is unknown
PIC16F688
;
;Init PORTA
;Set RA<2:0> to
;digital I/O
;
;digital I/O
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
TRISA1
R/W-0
R/W-1
RA1
DS41203E-page 33
TRISA0
R/W-0
R/W-1
RA0
bit 0
bit 0