ATMEGA48A-CCU Atmel, ATMEGA48A-CCU Datasheet - Page 100
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ATMEGA48A-CCU
Manufacturer Part Number
ATMEGA48A-CCU
Description
IC MCU AVR 4K FLASH VFBGA
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48A-CCU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-UFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.6.1
14.7
8271C–AVR–08/10
Modes of Operation
Compare Output Mode and Waveform Generation
Figure 14-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform
Generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is visi-
ble on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC0x state before the out-
put is enabled. Note that some COM0x1:0 bit settings are reserved for certain modes of
operation.
The Waveform Generator uses the COM0x1:0 bits differently in Normal, CTC, and PWM modes.
For all modes, setting the COM0x1:0 = 0 tells the Waveform Generator that no action on the
OC0x Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to
page
A change of the COM0x1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC0x strobe bits.
The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins, is
defined by the combination of the Waveform Generation mode (WGM02:0) and Compare Output
mode (COM0x1:0) bits. The Compare Output mode bits do not affect the counting sequence,
while the Waveform Generation mode bits do. The COM0x1:0 bits control whether the PWM out-
put generated should be inverted or not (inverted or non-inverted PWM). For non-PWM modes
the COM0x1:0 bits control whether the output should be set, cleared, or toggled at a compare
match
For detailed timing information refer to
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
107, and for phase correct PWM refer to
(See Section “14.6” on page
See Section “14.9” on page 107.
COMnx1
COMnx0
FOCn
clk
I/O
Table 14-2 on page
Waveform
Generator
99.).
”Timer/Counter Timing Diagrams” on page
D
D
D
PORT
DDR
OCnx
Table 14-4 on page
107. For fast PWM mode, refer to
Q
Q
Q
1
0
108.
OCnx
Pin
Table 14-3 on
105.
100
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