AT89C4051-24PU Atmel, AT89C4051-24PU Datasheet - Page 9

• Manufacturer Part Number: AT89C4051-24PU
• Description: IC MCU 4K FLASH 24MHZ 20-DIP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C4051-24PU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR
• Number Of I /o: 15
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Cpu Family: 89C
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: UART
• Total Internal Ram Size: 128Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 4V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP W
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

13. Programming Interface
13.1
Notes:
1001F–MICRO–6/08
Mode
Write Code Data
Read Code Data
Write Lock
Chip Erase
Read Signature Byte
Flash Programming Modes
1. The internal PEROM address counter is reset to 000H on the rising edge of RST and is advanced by a positive pulse at
2. Chip Erase requires a 10-ms PROG pulse.
3. P3.1 is pulled Low during programming to indicate RDY/BSY.
XTAL1 pin.
(1)(3)
(1)
Program Verify: If lock bits LB1 and LB2 have not been programmed code data can be read
back via the data lines for verification:
The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that
their features are enabled.
Chip Erase: The entire PEROM array (4K bytes) and the two Lock Bits are erased electrically
by using the proper combination of control signals and by holding P3.2 low for 10 ms. The code
array is written with all “1”s in the Chip Erase operation and must be executed before any non-
blank memory byte can be re-programmed.
Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor-
mal verification of locations 000H, 001H, and 002H, except that P3.5 and P3.7 must be pulled to
a logic low. The values returned are as follows.
Every code byte in the Flash array can be written and the entire array can be erased by using
the appropriate combination of control signals. The write operation cycle is self-timed and once
initiated, will automatically time itself to completion.
Most major worldwide programming vendors offer support for the Atmel AT89 microcontroller
series. Please contact your local programming vendor for the appropriate software revision.
1. Reset the internal address counter to 000H by bringing RST from “L” to “H”.
2. Apply the appropriate control signals for Read Code data and read the output data at
3. Pulse pin XTAL1 once to advance the internal address counter.
4. Read the next code data byte at the port P1 pins.
5. Repeat steps 3 and 4 until the entire array is read.
(000H) = 1EH indicates manufactured by Atmel
(001H) = 41H indicates AT89C4051
the port P1 pins.
Bit - 1
Bit - 2
RST/V
12V
12V
12V
12V
H
H
PP
P3.2/PROG
H
H
(2)
P3.3
H
H
H
L
L
L
P3.4
H
H
H
L
L
L
AT89C4051
P3.5
H
H
H
L
L
L
P3.7
H
H
H
L
L
L
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