ATTINY43U-SUR Atmel, ATTINY43U-SUR Datasheet - Page 177
ATTINY43U-SUR
Manufacturer Part Number
ATTINY43U-SUR
Description
MCU AVR 4KB FLASH 8MHZ 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY43U-SU.pdf
(182 pages)
Specifications of ATTINY43U-SUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table of Contents
8048B–AVR–03/09
1
2
3
4
5
6
7
Features ..................................................................................................... 1
Pin Configurations ................................................................................... 2
Overview ................................................................................................... 4
About ......................................................................................................... 6
AVR CPU Core .......................................................................................... 7
Memories ................................................................................................ 15
System Clock and Clock Options ......................................................... 23
Power Management and Sleep Modes ................................................. 31
1.1
3.1
3.2
3.3
3.4
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
5.1
5.2
5.3
5.4
5.5
5.6
6.1
6.2
6.3
6.4
6.5
Pin Descriptions .................................................................................................2
Resources .........................................................................................................6
Code Examples .................................................................................................6
Data Retention ...................................................................................................6
Disclaimer ..........................................................................................................6
Introduction ........................................................................................................7
Architectural Overview .......................................................................................7
ALU – Arithmetic Logic Unit ...............................................................................8
Status Register ..................................................................................................8
General Purpose Register File ........................................................................10
Stack Pointer ...................................................................................................11
Instruction Execution Timing ...........................................................................12
Reset and Interrupt Handling ...........................................................................13
Overview ..........................................................................................................15
In-System Re-programmable Flash Program Memory ....................................15
SRAM Data Memory ........................................................................................15
EEPROM Data Memory ..................................................................................16
I/O Memory ......................................................................................................20
Register Description ........................................................................................20
Clock Systems and their Distribution ...............................................................23
Clock Sources .................................................................................................24
System Clock Prescaler ..................................................................................27
Clock Output Buffer .........................................................................................28
Register Description ........................................................................................28
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