PIC16C712-04/P Microchip Technology, PIC16C712-04/P Datasheet - Page 101
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PIC16C712-04/P
Manufacturer Part Number
PIC16C712-04/P
Description
IC MCU OTP 1KX14 A/D PWM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C716-04P.pdf
(106 pages)
2.PIC16C716-04P.pdf
(14 pages)
3.PIC16C712-04P.pdf
(109 pages)
Specifications of PIC16C712-04/P
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
4MHz
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C712-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
INDEX
A
A/D ..................................................................................... 45
Absolute Maximum Ratings ............................................... 75
ADCON0 Register ........................................................ 11, 45
ADCON1 Register .................................................. 12, 45, 46
ADRES Register .................................................... 11, 45, 47
Architecture
Assembler
B
Banking, Data Memory ................................................ 10, 13
Brown-Out Detect (BOD) ................................................... 55
Brown-out Reset (BOR) ................................... 51, 54, 58, 59
C
Capture (CCP Module) ...................................................... 40
Capture/Compare/PWM (CCP) .......................................... 39
CCP1CON Register ........................................................... 39
1999 Microchip Technology Inc.
A/D Converter Enable (ADIE Bit) ............................... 16
A/D Converter Flag (ADIF Bit) ............................. 17, 47
A/D Converter Interrupt, Configuring ......................... 47
ADCON0 Register ................................................ 11, 45
ADCON1 Register .......................................... 12, 45, 46
ADRES Register ............................................ 11, 45, 47
Analog Port Pins, Configuring .................................... 49
Block Diagram ............................................................ 47
Block Diagram, Analog Input Model ........................... 48
Channel Select (CHS2:CHS0 Bits) ............................ 45
Clock Select (ADCS1:ADCS0 Bits) ............................ 45
Configuring the Module .............................................. 47
Conversion Clock (T
Conversion Status (GO/DONE Bit) ...................... 45, 47
Conversions ............................................................... 50
Converter Characteristics .......................................... 88
Module On/Off (ADON Bit) ......................................... 45
Port Configuration Control (PCFG2:PCFG0 Bits) ...... 46
Sampling Requirements ............................................. 48
Special Event Trigger (CCP) ................................ 41, 50
Timing Diagram .......................................................... 89
ADCS1:ADCS0 Bits ................................................... 45
ADON Bit ................................................................... 45
CHS2:CHS0 Bits ........................................................ 45
GO/DONE Bit ....................................................... 45, 47
PCFG2:PCFG0 Bits ................................................... 46
PIC16C62B/PIC16C72A Block Diagram ...................... 5
MPASM Assembler .................................................... 71
BOR Enable (BODEN Bit) .......................................... 52
BOR Status (BOR Bit) ................................................ 18
Timing Diagram .......................................................... 85
Block Diagram ............................................................ 40
CCP Pin Configuration ............................................... 40
CCPR1H:CCPR1L Registers ..................................... 40
Changing Between Capture Prescalers ..................... 40
Software Interrupt ...................................................... 40
Timer1 Mode Selection .............................................. 40
CCP1CON Register ............................................. 11, 39
CCPR1H Register ................................................ 11, 39
CCPR1L Register ................................................ 11, 39
Enable (CCP1IE Bit) .................................................. 16
Flag (CCP1IF Bit) ....................................................... 17
Timer Resources ........................................................ 39
Timing Diagram .......................................................... 87
CCP1M3:CCP1M0 Bits .............................................. 39
CCP1X:CCP1Y Bits ................................................... 39
AD
) ............................................. 49
Preliminary
Code Protection ........................................................... 51, 65
Compare (CCP Module) .................................................... 41
Configuration Bits .............................................................. 51
Conversion Considerations ................................................ 99
D
Data Memory ..................................................................... 10
DC Characteristics ....................................................... 77, 79
Development Support ........................................................ 69
Development Tools ............................................................ 69
Direct Addressing .............................................................. 20
E
Electrical Characteristics ................................................... 75
Errata ................................................................................... 3
External Power-on Reset Circuit ........................................ 55
F
Family of Devices
Firmware Instructions ........................................................ 67
Fuzzy Logic Dev. System ( fuzzy TECH -MP) ................... 71
I
I/O Ports ............................................................................ 21
ICEPIC Low-Cost PIC16CXXX In-Circuit Emulator ........... 69
ID Locations ................................................................. 51, 65
In-Circuit Serial Programming (ICSP) .......................... 51, 65
Indirect Addressing ............................................................ 20
Instruction Format .............................................................. 67
Instruction Set .................................................................... 67
INTCON Register ......................................................... 11, 15
Interrupt Sources ......................................................... 51, 61
Interrupts, Context Saving During ...................................... 62
Interrupts, Enable Bits
CP1:CP0 Bits ............................................................. 52
Block Diagram ........................................................... 41
CCP Pin Configuration .............................................. 41
CCPR1H:CCPR1L Registers .................................... 41
Software Interrupt ...................................................... 41
Special Event Trigger .................................... 34, 41, 50
Timer1 Mode Selection .............................................. 41
Bank Select (RP1:RP0 Bits) ................................ 10, 13
General Purpose Registers ....................................... 10
Register File Map ...................................................... 10
Special Function Registers ........................................ 11
PIC16C7XX ................................................................. 2
FSR Register ................................................. 10, 11, 20
INDF Register ............................................................ 11
Summary Table ......................................................... 68
GIE Bit ....................................................................... 15
INTE Bit ..................................................................... 15
INTF Bit ..................................................................... 15
PEIE Bit ..................................................................... 15
RBIE Bit ..................................................................... 15
RBIF Bit ............................................................... 15, 24
T0IE Bit ...................................................................... 15
T0IF Bit ...................................................................... 15
A/D Conversion Complete ......................................... 47
Block Diagram ........................................................... 61
Capture Complete (CCP) .......................................... 40
Compare Complete (CCP) ........................................ 41
Interrupt on Change (RB7:RB4 ) ............................... 24
RB0/INT Pin, External ............................................... 62
TMR0 Overflow .................................................... 30, 62
TMR1 Overflow .................................................... 31, 34
TMR2 to PR2 Match .................................................. 37
TMR2 to PR2 Match (PWM) ................................ 36, 42
PIC16C712/716
DS41106A-page 101