PIC16C712-04/P Microchip Technology, PIC16C712-04/P Datasheet - Page 63
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PIC16C712-04/P
Manufacturer Part Number
PIC16C712-04/P
Description
IC MCU OTP 1KX14 A/D PWM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C716-04P.pdf
(106 pages)
2.PIC16C716-04P.pdf
(14 pages)
3.PIC16C712-04P.pdf
(109 pages)
Specifications of PIC16C712-04/P
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
4MHz
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C712-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
9.12
The Watchdog Timer is as a free running, on-chip, RC
oscillator which does not require any external compo-
nents. This RC oscillator is separate from the RC oscil-
lator of the OSC1/CLKIN pin. That means that the WDT
will run, even if the clock on the OSC1/CLKIN and
OSC2/CLKOUT pins of the device have been stopped,
for example, by execution of a SLEEP instruction.
During normal operation, a WDT time-out generates a
device RESET (Watchdog Timer Reset). If the device is
in SLEEP mode, a WDT time-out causes the device to
wake-up and continue with normal operation (Watch-
dog Timer Wake-up). The TO bit in the STATUS register
will be cleared upon a Watchdog Timer time-out.
The WDT can be permanently disabled by clearing
configuration bit WDTE (Section 9.1).
FIGURE 9-15: WATCHDOG TIMER BLOCK DIAGRAM
FIGURE 9-16: SUMMARY OF WATCHDOG TIMER REGISTERS
Address Name
2007h
81h
Legend: Shaded cells are not used by the Watchdog Timer.
Note 1: See Figure 9-1 for operation of these bits.
Note: PSA and PS2:PS0 are bits in the OPTION_REG register.
1999 Microchip Technology Inc.
Watchdog Timer (WDT)
Config. bits
OPTION_REG
WDT Timer
Enable Bit
WDT
Bits 13:8
N/A
(1)
From TMR0 Clock Source
(Figure 4-2)
RBPU
Bit 7
—
0
1
PSA
BODEN
M
U
X
INTEDG
Preliminary
Bit 6
(1)
T0CS T0SE
Bit 5
CP1
WDT time-out period values may be found in the Elec-
trical Specifications section under T
#31). Values for the WDT prescaler (actually a
postscaler, but shared with the Timer0 prescaler) may
be assigned using the OPTION_REG register.
.
0
Note:
Note:
Time-out
8 - to - 1 MUX
MUX
WDT
Postscaler
Bit 4
CP0
The CLRWDT and SLEEP instructions clear
the WDT and the postscaler, if assigned to
the WDT, and prevent it from timing out and
generating a device RESET condition.
When a CLRWDT instruction is executed
and the prescaler is assigned to the WDT,
the prescaler count will be cleared, but the
prescaler assignment is not changed.
1
8
PWRTE
PIC16C712/716
Bit 3
PSA
PSA
To TMR0 (Figure 4-2)
(1)
PS2:PS0
WDTE FOSC1 FOSC0
Bit 2
PS2
DS41106A-page 63
Bit 1
PS1
WDT
(parameter
Bit 0
PS0