PIC12LC671-04I/P Microchip Technology, PIC12LC671-04I/P Datasheet - Page 78
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PIC12LC671-04I/P
Manufacturer Part Number
PIC12LC671-04I/P
Description
IC MCU OTP 1KX14 LV A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Specifications of PIC12LC671-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
PIC12LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8
For Use With
309-1051 - ADAPTER 8-DIP BD W/2 SO PLUGS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC12C67X
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
DS30561B-page 78
OPTION
No Operation
[ label ]
None
No operation
None
No operation.
1
1
Load Option Register
[ label ]
None
(W)
None
The contents of the W register are
loaded in the OPTION register.
This instruction is supported for
code compatibility with PIC16C5X
products. Since OPTION is a read-
able/writable register, the user can
directly address it.
1
1
To maintain upward compatibility
with future PIC12C67X products,
do not use this instruction.
NOP
00
00
OPTION
NOP
OPTION
0000
0000
0110
0xx0
0010
0000
RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
TABLE
Return from Interrupt
[ label ]
None
TOS
1
None
Return from Interrupt. Stack is
POPed and Top of Stack (TOS) is
loaded in the PC. Interrupts are
enabled by setting Global Inter-
rupt Enable bit, GIE
(INTCON<7>). This is a two cycle
instruction.
1
2
After Interrupt
Return with Literal in W
[ label ]
0
k
TOS
None
The W register is loaded with the
eight bit literal ’k’. The program
counter is loaded from the top of
the stack (the return address).
This is a two cycle instruction.
1
2
CALL TABLE;W contains
table
•
•
•
ADDWF PC
RETLW k1
RETLW k2
•
•
•
RETLW kn
Before Instruction
After Instruction
RETFIE
00
11
k
GIE
(W);
1999 Microchip Technology Inc.
255
;offset value
PC,
PC
;W now has table value
PC =
GIE =
W
W
RETFIE
RETLW k
0000
01xx
;Begin table
;
; End of table
=
=
;W = offset
TOS
1
0x07
value of k8
0000
kkkk
1001
kkkk