ATMEGA8U2-MU Atmel, ATMEGA8U2-MU Datasheet - Page 106
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ATMEGA8U2-MU
Manufacturer Part Number
ATMEGA8U2-MU
Description
MCU AVR 8K FLASH USB 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8U2-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
Minimum Operating Temperature
- 40 C
Package
32QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
- Current page: 106 of 309
- Download datasheet (6Mb)
15.9.3
15.9.4
15.9.5
15.9.6
7799D–AVR–11/10
TCNT0 – Timer/Counter Register
OCR0A – Output Compare Register A
OCR0B – Output Compare Register B
TIMSK0 – Timer/Counter Interrupt Mask Register
Table 15-9.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a Compare Match between TCNT0 and the OCR0x Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
• Bits 7:3 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
Bit
0x26 (0x46)
Read/Write
Initial Value
Bit
0x27 (0x47)
Read/Write
Initial Value
Bit
0x28 (0x48)
Read/Write
Initial Value
Bit
(0x6E)
Read/Write
Initial Value
CS02
1
1
1
1
CS01
0
0
1
1
Clock Select Bit Description (Continued)
R/W
R/W
R/W
R
7
0
7
0
7
0
7
–
0
CS00
0
1
0
1
R/W
R/W
R/W
R
6
–
0
6
0
6
0
6
0
Description
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
I/O
/256 (From prescaler)
/1024 (From prescaler)
R/W
R/W
R/W
R
5
–
0
5
0
5
0
5
0
R/W
R/W
R/W
R
4
–
0
4
0
4
0
4
0
OCR0A[7:0]
OCR0B[7:0]
TCNT0[7:0]
ATmega8U2/16U2/32U2
R/W
R/W
R/W
R
3
–
0
3
0
3
0
3
0
OCIE0B
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
OCIE0A
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
TCNT0
OCR0A
OCR0B
TIMSK0
106
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