ATMEGA88-20MUR Atmel, ATMEGA88-20MUR Datasheet - Page 155

• Manufacturer Part Number: ATMEGA88-20MUR
• Description: MCU AVR 8K FLASH 20MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA88-20MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SPI/TWI/USART
• Total Internal Ram Size: 1KB
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Package Type: MLF EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2545T–AVR–05/11
Table 18-6
mode.
Table 18-6.
Note:
Table 18-7
rect PWM mode.
Table 18-7.
Note:
• Bits 3, 2 – Res: Reserved bits
These bits are reserved bits in the Atmel ATmega48/88/168 and will always read as zero.
• Bits 1:0 – WGM21:0: Waveform generation mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode,
and two types of Pulse Width Modulation (PWM) modes (see
145).
COM2B1
COM2B1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 148
pare Match is ignored, but the set or clear is done at TOP. See
page 148
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
Compare output mode, fast PWM mode
Compare output mode, phase correct PWM mode
COM2B0
COM2B0
for more details.
for more details.
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2B disconnected
Reserved
Clear OC2B on compare match, set OC2B at BOTTOM,
(non-inverting mode)
Set OC2B on compare match, clear OC2B at BOTTOM,
(invertiing mode)
Description
Normal port operation, OC2B disconnected
Reserved
Clear OC2B on compare match when up-counting
Set OC2B on compare match when down-counting
Set OC2B on compare match when up-counting
Clear OC2B on compare match when down-counting
Table 18-8 on page
156. Modes of operation supported by the
(1)
.
ATmega48/88/168
(1)
“Modes of operation” on page
.
“Phase correct PWM mode” on
“Phase correct PWM mode” on
155