ATMEGA88-20MUR Atmel, ATMEGA88-20MUR Datasheet - Page 47

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ATMEGA88-20MUR

Manufacturer Part Number
ATMEGA88-20MUR
Description
MCU AVR 8K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
MLF EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.4
11.5
2545T–AVR–05/11
External reset
Brown-out detection
Figure 11-3. MCU start-up, RESET extended externally.
An external reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see
even if the clock is not running. Shorter pulses are not guaranteed to generate a reset. When the
applied signal reaches the reset threshold voltage – V
ter starts the MCU after the time-out period – t
disabled by the RSTDISBL fuse, see
Figure 11-4. External reset during operation.
The Atmel ATmega48/88/168 has an on-chip brown-out detection (BOD) circuit for monitoring
the V
BOD can be selected by the BODLEVEL Fuses. The trigger level has a hysteresis to ensure
spike free brown-out detection. The hysteresis on the detection level should be interpreted as
V
decreases to a value below the trigger level (V
reset is immediately activated. When V
on page
The BOD circuit will only detect a drop in V
ger than t
BOT+
INTERNAL
TIME-OUT
CC
= V
RESET
RESET
level during operation by comparing it to a fixed trigger level. The trigger level for the
48), the delay counter starts the MCU after the Time-out period t
BOD
V
BOT
CC
CC
given in
+ V
HYST
“System and reset characteristics” on page
/2 and V
“System and reset characteristics” on page
V
POT
BOT-
Table 28-6 on page
= V
CC
BOT
increases above the trigger level (V
CC
- V
if the voltage stays below the trigger level for lon-
V
BOT-
RST
TOUT
HYST
t
TOUT
in
– has expired. The external reset can be
RST
/2.When the BOD is enabled, and V
Figure 11-5 on page
287.
– on its positive edge, the delay coun-
ATmega48/88/168
307.
307) will generate a reset,
TOUT
48), the brown-out
BOT+
has expired.
in
Figure 11-5
47
CC

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