ATMEGA88-20MUR Atmel, ATMEGA88-20MUR Datasheet - Page 186
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ATMEGA88-20MUR
Manufacturer Part Number
ATMEGA88-20MUR
Description
MCU AVR 8K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA88-20MUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
MLF EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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19.8.3
186
ATmega48/88/168
Asynchronous Operational Range
Figure 19-7. Stop Bit Sampling and Next Start Bit Sampling
The same majority voting is done to the stop bit as done for the other bits in the frame. If the stop
bit is registered to have a logic 0 value, the Frame Error (FEn) Flag will be set.
A new high to low transition indicating the start bit of a new frame can come right after the last of
the bits used for majority voting. For Normal Speed mode, the first low level sample can be at
point marked (A) in
(B). (C) marks a stop bit of full length. The early start bit detection influences the operational
range of the Receiver.
The operational range of the Receiver is dependent on the mismatch between the received bit
rate and the internally generated baud rate. If the Transmitter is sending frames at too fast or too
slow bit rates, or the internally generated baud rate of the Receiver does not have a similar (see
Table
bit.
The following equations can be used to calculate the ratio of the incoming data rate and internal
receiver baud rate.
D
S
S
S
R
Table 19-2
that Normal Speed mode has higher toleration of baud rate variations.
F
M
slow
19-2) base frequency, the Receiver will not be able to synchronize the frames to the start
(U2X = 0)
(U2X = 1)
Sample
Sample
RxD
R
and
slow
Sum of character size and parity size (D = 5 to 10 bit)
Samples per bit. S = 16 for Normal Speed mode and S = 8 for Double Speed
mode.
First sample number used for majority voting. S
for Double Speed mode.
Middle sample number used for majority voting. S
S
is the ratio of the slowest incoming data rate that can be accepted in relation to the
receiver baud rate. R
accepted in relation to the receiver baud rate.
M
Table 19-3
=
= 5 for Double Speed mode.
Figure
------------------------------------------ -
S 1
–
1
1
(
D
+
2
+
D S ⋅
19-7. For Double Speed mode the first low level must be delayed to
list the maximum receiver baud rate error that can be tolerated. Note
1
)S
3
2
+
S
4
F
fast
5
3
is the ratio of the fastest incoming data rate that can be
6
7
4
8
STOP 1
9
5
10
(A)
0/1
6
R
0/1
F
fast
= 8 for normal speed and S
M
0/1
0/1
(B)
= 9 for normal speed and
=
-----------------------------------
(
D
(
+
D
1
+
)S
2
)S
+
(C)
S
M
2545S–AVR–07/10
F
= 4
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