PIC16LC716-04I/P Microchip Technology, PIC16LC716-04I/P Datasheet - Page 26
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PIC16LC716-04I/P
Manufacturer Part Number
PIC16LC716-04I/P
Description
IC MCU OTP 2KX14 A/D PWM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C716-04P.pdf
(106 pages)
Specifications of PIC16LC716-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC16C712/716
3.2
PORTB is an 8-bit wide bidirectional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (= 1) will make the corresponding PORTB
pin an input, (i.e., put the corresponding output driver in
a High-Impedance mode). Clearing a TRISB bit (= 0)
will make the corresponding PORTB pin an output,
(i.e., put the contents of the output latch on the selected
pin).
EXAMPLE 3-2:
FIGURE 3-3:
DS41106B-page 24
BCF
CLRF
BSF
MOVLW
MOVWF
PORTB and the TRISB Register
Note 1:
STATUS, RP0
PORTB
STATUS, RP0
0xCF
TRISB
To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).
DATA BUS
WR TRIS
INITIALIZING PORTB
BLOCK DIAGRAM OF RB0 PIN
WR PORT
RBPU
RB0/INT
;
; Initialize PORTB by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
(1)
RD TRIS
RD PORT
TRIS Latch
Data Latch
D
D
CK
CK
Schmitt Trigger
Buffer
Q
Q
Q
EN
TTL
Input
Buffer
D
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (OPTION_REG<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on a Power-on Reset.
V
P
RD PORT
DD
weak
pull-up
V
SS
V
DD
I/O
pin
© 2005 Microchip Technology Inc.