ATTINY2313V-10SU Atmel, ATTINY2313V-10SU Datasheet - Page 5

• Manufacturer Part Number: ATTINY2313V-10SU
• Description: IC MCU AVR 2K FLASH 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313V-10SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 10MHz
• Interface Type: SPI/USART/USI
• Total Internal Ram Size: 128Byte
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 1.8V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Package: 20SOIC
• Family Name: ATtiny
• Maximum Speed: 10 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Processor Series: ATTINY2x
• Core: AVR8
• Data Ram Size: 128 B
• Maximum Clock Frequency: 10 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AVR Tiny
• No. Of I/o's: 18
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 10MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Pin Descriptions
VCC
GND
Port A (PA2..PA0)
Port B (PB7..PB0)
Port D (PD6..PD0)
RESET
XTAL1
XTAL2
2543L–AVR–08/10
Digital supply voltage.
Ground.
Port A is a 3-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port A also serves the functions of various special features of the ATtiny2313 as listed on
53.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATtiny2313 as listed on
53.
Port D is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the ATtiny2313 as listed on
56.
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
34. Shorter pulses are not guaranteed to generate a reset. The Reset Input is an alternate func-
tion for PA2 and dW.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL1
is an alternate function for PA0.
Output from the inverting Oscillator amplifier. XTAL2 is an alternate function for PA1.
Table 15 on page
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