PIC16F886-I/SP Microchip Technology, PIC16F886-I/SP Datasheet - Page 13
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PIC16F886-I/SP
Manufacturer Part Number
PIC16F886-I/SP
Description
IC PIC MCU FLASH 8KX14 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
5.PIC16F883-ISO.pdf
(288 pages)
Specifications of PIC16F886-I/SP
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM164123 - KIT MANAGEMENT SYSTEM PICDEMDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F886-I/SP
Manufacturer:
NXP
Quantity:
2 400
3.2.6
The ICSPCLK pin is used as a clock input and the
ICSPDAT pin is used for entering command bits and
data input/output during serial operation. To input a
command, ICSPCLK is cycled six times. Each
command bit is latched on the falling edge of the clock
with the LSb of the command being input first. The data
input onto the ICSPDAT pin is required to have a
minimum setup and hold time (see Table 6-1), with
respect to the falling edge of the clock. Commands that
have data associated with them (Read and Load) are
specified to have a minimum delay of T
the command and the data. After this delay, the clock
pin is cycled 16 times with the first cycle being a Start
bit and the last cycle being a Stop bit.
TABLE 3-1:
2009 Microchip Technology Inc.
Load Configuration
Load Data For Program Memory
Load Data For Data Memory
Read Data From Program Memory
Read Data From Data Memory
Increment Address
Begin Programming
Begin Programming
End Programming
Bulk Erase Program Memory
Bulk Erase Data Memory
Row Erase Program Memory
SERIAL PROGRAM/VERIFY
OPERATION
Command
COMMAND MAPPING FOR PIC16F88X
DLY
1 between
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
1
0
x
x
1
Mapping (MSb … LSb)
0
0
0
0
0
0
1
1
1
1
1
0
During a read operation, the LSb will be transmitted
onto ICSPDAT pin on the rising edge of the second
cycle. For a load operation, the LSb will be latched on
the falling edge of the second cycle. A minimum T
delay
commands,
command, which requires a T
All commands and data words are transmitted LSb first.
Data is transmitted on the rising edge and latched on
the falling edge of the ICSPCLK. To allow for decoding
of commands and reversal of data pin configuration, a
time separation of at least T
command and a data word.
The commands that are available are described in
Table 3-1.
0
0
0
1
1
1
0
0
0
0
0
0
is
also
except
0
1
1
0
0
1
0
0
1
0
1
0
specified
0
0
1
0
1
0
0
0
0
1
1
1
for
PIC16F88X
DLY
0, data (14), 0
0, data (14), 0
0, data (8), zero (6), 0
0, data (14), 0
0, data (8), zero (6), 0
Internally Timed
Externally Timed
Internally Timed
Internally Timed
Internally Timed
the
DIS
between
1 is required between a
.
End
DS41287D-page 13
Data
Programming
consecutive
DLY
1