PIC16LC554-04I/P Microchip Technology, PIC16LC554-04I/P Datasheet - Page 37
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PIC16LC554-04I/P
Manufacturer Part Number
PIC16LC554-04I/P
Description
IC MCU OTP 512X14 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C554-04P.pdf
(108 pages)
Specifications of PIC16LC554-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
896B (512 x 14)
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
80 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
6.3
The PIC16C55X differentiates between various kinds
of RESET:
• Power-on Reset (POR)
• MCLR Reset during normal operation
• MCLR Reset during SLEEP
• WDT Reset (normal operation)
• WDT wake-up (SLEEP)
Some registers are not affected in any RESET condi-
tion; their status is unknown on POR and unchanged in
any other RESET. Most other registers are reset to a
“RESET state” on Power-on Reset, on MCLR or WDT
Reset and on MCLR Reset during SLEEP. They are not
affected by a WDT wake-up, since this is viewed as the
resumption of normal operation. TO and PD bits are set
or cleared differently in different RESET situations as
indicated in Table 6-4. These bits are used in software
to determine the nature of the RESET. See Table 6-6
for a full description of RESET states of all registers.
FIGURE 6-6:
2002 Microchip Technology Inc.
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
V
MCLR/
OSC1/
CLKIN
PP
V
Pin
DD
Pin
RESET
On-chip
RC OSC
OST/PWRT
V
Module
(1)
detect
WDT
DD
rise
OST
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
PWRT
10-bit Ripple-counter
Reset
10-bit Ripple-counter
WDT
Timeout
Power-on Reset
External
Reset
SLEEP
Preliminary
Enable PWRT
Enable OST
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 6-6.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 10-3 for pulse width
specification.
See Table 6-3 for timeout situations.
PIC16C55X
S
R
DS40143D-page 35
Q
Chip_Reset