ATTINY26L-8SU Atmel, ATTINY26L-8SU Datasheet - Page 124

• Manufacturer Part Number: ATTINY26L-8SU
• Description: ID MCU AVR 2K 5V 8MHZ 20-SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY26L-8SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Package: 20SOIC
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Interface Type: SPI/USI
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 2
• Cpu Family: ATtiny
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 16
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Processor Series: ATTINY2x
• Core: AVR8
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATTINY26L-8SJ; ATTINY26L-8SJ

Table 61. Serial Programming Instruction Set
Note:
124
Instruction
Programming Enable
Chip Erase
Read Program Memory
Load Program Memory Page
Write Program Memory Page
Read EEPROM Memory
Write EEPROM Memory
Read Lock Bits
Write Lock Bits
Read Signature Byte
Write Fuse Bits
Write Fuse High Bits
Read Fuse Bits
Read Fuse High Bits
Read Calibration Byte
a = address high bits
b = address low bits
H = 0 – Low byte, 1 – High Byte
o = data out
i = data in
x = don’t care
ATtiny26(L)
1010 1100
1010 1100
0010 H000
0100 H000
0100 1100
1010 0000
1100 0000
0101 1000
1010 1100
0011 0000
1010 1100
1010 1100
0101 0000
0101 1000
0011 1000
Byte 1
0101 0011
100x xxxx
xxxx xxaa
xxxx xxxx
xxxx xxaa
xxxx xxxx
xxxx xxxx
0000 0000
111x xxxx
xxxx xxxx
1010 0000
1010 1000
0000 0000
0000 1000
xxxx xxxx
Byte 2
Instruction Format
xxxx xxxx
xxxx xxxx
bbbb bbbb
xxxx bbbb
bbbb xxxx
xbbb bbbb
xbbb bbbb
xxxx xxxx
xxxx xxxx
xxxx xxbb
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 00bb
Byte 3
xxxx xxxx
xxxx xxxx
oooo oooo
iiii iiii
xxxx xxxx
oooo oooo
iiii iiii
xxxx xxoo
1111 11ii
oooo oooo
iiii iiii
xxxi iiii
oooo oooo
xxxo oooo
oooo oooo
Byte4
Operation
Enable Serial Programming after
RESET goes low.
Chip Erase EEPROM and Flash.
Read H (high or low) data o from
Program memory at word address a:b.
Write H (high or low) data i to Program
Memory page at word address b. Data
low byte must be loaded before data
high byte is applied within the same
address.
Write Program Memory Page at
address a:b.
Read data o from EEPROM memory at
address b.
Write data i to EEPROM memory at
address b.
Read Lock bits. “0” = programmed, “1”
= unprogrammed. See
page 107
Write Lock bits. Set bits = “0” to
program Lock bits. See
page 107
Read Signature Byte o at address b.
Set bits = “0” to program, “1” to
unprogram. See
108
Set bits = “0” to program, “1” to
unprogram. See
108
Read Fuse bits. “0” = programmed, “1”
= unprogrammed. See
page 108
Read Fuse high bits.
“0” = programmed,
“1” = unprogrammed. See
on page 108
Read Calibration Byte o.
for details.
for details.
for details.
for details.
for details.
for details.
Table 51 on page
Table 50 on page
Table 48 on
Table 51 on
Table 48 on
1477K–AVR–08/10
Table 50