ATTINY26L-8SU Atmel, ATTINY26L-8SU Datasheet - Page 87

ID MCU AVR 2K 5V 8MHZ 20-SOIC

ATTINY26L-8SU

Manufacturer Part Number
ATTINY26L-8SU
Description
ID MCU AVR 2K 5V 8MHZ 20-SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY26L-8SU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Package
20SOIC
Device Core
AVR
Family Name
ATtiny
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Interface Type
SPI/USI
On-chip Adc
11-chx10-bit
Number Of Timers
2
Cpu Family
ATtiny
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
16
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
SOIC
Processor Series
ATTINY2x
Core
AVR8
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATTINY26L-8SJ
ATTINY26L-8SJ

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SPI Slave Operation
Example
1477K–AVR–08/10
The following code demonstrates how to use the USI module as a SPI Master with maximum
speed (fsck = fck/2):
The following code demonstrates how to use the USI module as a SPI slave:
The code is size optimized using only 8 instructions (+ ret). The code example assumes that the
DO is configured as output and SCK pin is configured as input in the DDRB Register. The value
stored in register r16 prior to the function is called is transferred to the master device, and when
the transfer is completed the data received from the master is stored back into the r16 register.
SPITransfer_Fast:
ret
init:
...
SlaveSPITransfer:
SlaveSPITransfer_loop:
out
ldi
ldi
out
out
out
out
out
out
out
out
out
out
out
out
out
out
out
out
in
ldi
out
out
ldi
out
sbis
rjmp
in
ret
USIDR,r16
r16,(1<<USIWM0)+(0<<USICS0)+(1<<USITC)
r17,(1<<USIWM0)+(0<<USICS0)+(1<<USITC)+(1<<USICLK)
USICR,r16 ; MSB
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16
USICR,r17
USICR,r16 ; LSB
USICR,r17
r16,USIDR
r16,(1<<USIWM0)+(1<<USICS1)
USICR,r16
USIDR,r16
r16,(1<<USIOIF)
USISR,r16
USISR,USIOIF
SlaveSPITransfer_loop
r16,USIDR
87

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