PIC18LF25K22-I/SP Microchip Technology, PIC18LF25K22-I/SP Datasheet - Page 451

• Manufacturer Part Number: PIC18LF25K22-I/SP
• Description: MCU 8BIT 32KB FLASH 3.6V 28SDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF25K22-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 7
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 17 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 27-13:
TABLE 27-14: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0 OR 1)
 2010 Microchip Technology Inc.
70
71
72
73
74
75
76
77
80
82
83
Param.
No.
(CKP = 0)
(CKP = 1)
SDI
SDI
SS
SCK
SCK
SDO
Note:
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscH2doV,
TscL2doV
TssL2doV
TscH2ssH,
TscL2ssH
Symbol
Refer to
SS  to SCK  or SCK  Input
SCK Input High Time
SCK Input Low Time
Setup Time of SDI Data Input to SCK Edge
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SS to SDO Output High-Impedance
SDO Data Output Valid after SCK Edge
SDO Data Output Valid after SS  Edge
SS  after SCK edge
Figure 27-4
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
80
71
for load conditions.
73
MSb In
MSb
74
Characteristic
72
75, 76
Preliminary
bit 6 - - - - - -1
bit 6 - - - -1
Continuous
Continuous
PIC18(L)F2X/4XK22
78
79
1.5 T
79
78
LSb In
LSb
Min
T
25
30
25
25
10
CY
—
—
—
—
CY
83
+ 40
77
Max
30
20
50
60
60
—
—
—
—
—
—
DS41412D-page 451
Units Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns