PIC16LC72A-04/SO Microchip Technology, PIC16LC72A-04/SO Datasheet - Page 19

• Manufacturer Part Number: PIC16LC72A-04/SO
• Description: IC MCU OTP 2KX14 A/D PWM 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC72A-04/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.0
Some I/O port pins are multiplexed with an alternate
function for the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Additional information on I/O ports may be found in the
PICmicro™
(DS33023).
3.1
PORTA is a 6-bit wide bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (=1) will make the corresponding PORTA pin
an input, i.e., put the corresponding output driver in a
hi-impedance mode. Clearing a TRISA bit (=0) will
make the corresponding PORTA pin an output, (i.e., put
the contents of the output latch on the selected pin).
The PORTA register reads the state of the pins,
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. There-
fore, a write to a port implies that the port pins are read,
this value is modified, and then written to the port data
latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin. The RA4/T0CKI
pin is a Schmitt Trigger input and an open drain output.
All other RA port pins have TTL input levels and full
CMOS output drivers.
Pin RA5 is multiplexed with the SSP to become the
RA5/SS pin.
On the PIC16C72A device, other PORTA pins are mul-
tiplexed with analog inputs and analog V
operation of each pin is selected by clearing/setting the
control bits in the ADCON1 register (A/D Control
Register1).
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
Note:
1999 Microchip Technology Inc.
I/O PORTS
PORTA and the TRISA Register
On a Power-on Reset, pins with analog
functions are configured as analog inputs
with digital input buffers disabled . A digital
read of these pins will return ’0’.
Mid-Range
Reference
REF
input. The
Manual,
Preliminary
FIGURE 3-1:
FIGURE 3-2:
WR
Port
Data
Bus
WR
TRIS
RD PORT
To A/D Converter (72A only)
Note 1: I/O pin has protection diodes to V
Note 1: I/O pins have protection diodes to V
Data
Bus
WR
TRIS
WR
PORT
RD PORT
TMR0 clock input
V
D
D
Data Latch
TRIS Latch
SS
CK
CK
PIC16C62B/72A
TRIS Latch
.
Data Latch
D
D
CK
CK
RD TRIS
BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
BLOCK DIAGRAM OF
RA4/T0CKI PIN
Q
Q
Q
Q
RD TRIS
Q
Q
Q
Q
Q
Q
Analog
input
mode
(72A
EN
only)
Schmitt
Trigger
input
buffer
EN
D
EN
DS35008B-page 19
D
V
N
SS
V
V
P
N
SS
DD
SS
DD
only.
I/O pin
and
TTL
input
buffer
I/O pin
(1)
(1)