ATMEGA165P-16AUR Atmel, ATMEGA165P-16AUR Datasheet - Page 154

• Manufacturer Part Number: ATMEGA165P-16AUR
• Description: MCU AVR 128K FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165P-16AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.4
8019K–AVR–11/10
Data Modes
There are four combinations of SCK phase and polarity with respect to serial data, which are
determined by control bits CPHA and CPOL. The SPI data transfer formats are shown in
17-3
nal, ensuring sufficient time for data signals to stabilize. This is clearly seen by summarizing
Table 17-3 on page 155
Table 17-2.
Figure 17-3. SPI Transfer Format with CPHA = 0
Figure 17-4. SPI Transfer Format with CPHA = 1
and
CPOL=0, CPHA=0
CPOL=0, CPHA=1
CPOL=1, CPHA=0
CPOL=1, CPHA=1
Figure
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
SS
MSB first (DORD = 0)
LSB first (DORD = 1)
MSB first (DORD = 0)
LSB first (DORD = 1)
CPOL Functionality
17-4. Data bits are shifted out and latched in on opposite edges of the SCK sig-
and
MSB
LSB
Table 17-4 on page
MSB
LSB
Sample (Falling)
Sample (Rising)
Leading Edge
Setup (Falling)
Setup (Rising)
Bit 6
Bit 1
Bit 6
Bit 1
Bit 5
Bit 2
Bit 5
Bit 2
155, as done below:
Bit 4
Bit 3
Bit 4
Bit 3
Bit 3
Bit 4
Sample (Falling)
Sample (Rising)
Setup (Falling)
Setup (Rising)
Trailing eDge
Bit 3
Bit 4
Bit 2
Bit 5
Bit 2
Bit 5
ATmega165P
Bit 1
Bit 6
Bit 1
Bit 6
LSB
MSB
LSB
MSB
SPI Mode
0
1
2
3
Figure
154