PIC18F2321-I/SS Microchip Technology, PIC18F2321-I/SS Datasheet - Page 31

• Manufacturer Part Number: PIC18F2321-I/SS
• Description: IC PIC MCU FLASH 4KX16 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2321-I/SS

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

2.7
The PIC18F4321 family of devices includes a feature
that allows the device clock source to be switched from
the main oscillator to an alternate clock source. These
devices also offer two alternate clock sources. When
an alternate clock source is enabled, the various
power-managed operating modes are available.
Essentially, there are three clock sources for these
devices:
• Primary oscillators
• Secondary oscillators
• Internal oscillator block
The primary oscillators include the External Crystal
and Resonator modes, the External RC modes, the
External Clock modes and the internal oscillator block.
The particular mode is defined by the FOSC3:FOSC0
Configuration bits. The details of these modes are
covered earlier in this chapter.
FIGURE 2-11:
© 2007 Microchip Technology Inc.
T1OSO
T1OSI
OSC2
OSC1
Clock Sources and Oscillator
Switching
Primary Oscillator
Secondary Oscillator
PIC18F4321 FAMILY CLOCK DIAGRAM
OSCCON<6:4>
Oscillator
Internal
Source
INTRC
Source
8 MHz
Block
T1OSCEN
Enable
Oscillator
Sleep
31 kHz (INTRC)
(INTOSC)
8 MHz
OSCTUNE<6>
PIC18F2221/2321/4221/4321
Preliminary
1
0
500 kHz
250 kHz
125 kHz
31 kHz
8 MHz
4 MHz
2 MHz
1 MHz
OSCCON<6:4>
The secondary oscillators are those external sources
not connected to the OSC1 or OSC2 pins. These
sources may continue to operate even after the
controller is placed in a power-managed mode.
The PIC18F4321 family of devices offers the Timer1
oscillator as a secondary oscillator. This oscillator, in all
power-managed modes, is often the time base for
functions such as a Real-Time Clock.
Most often, a 32.768 kHz watch crystal is connected
between the RC0/T1OSO/T13CKI and RC1/T1OSI
pins. Like the LP mode oscillator circuit, loading
capacitors are also connected from each pin to ground.
The Timer1 oscillator is discussed in greater detail in
Section 12.3 “Timer1 Oscillator”.
In addition to being a primary clock source, the internal
oscillator block is available as a power-managed
mode clock source. The INTRC source is also used as
the clock source for several special features, such as
the WDT and Fail-Safe Clock Monitor.
The clock sources for the PIC18F4321 family of devices
are shown in Figure 2-11. See Section 23.0 “Special
Features of the CPU” for Configuration register details.
OSCTUNE<7>
PIC18F4321 FAMILY
111
110
101
100
011
010
001
000
4 x PLL
HSPLL, INTOSC/PLL
LP, XT, HS, RC, EC
Internal Oscillator
FOSC3:FOSC0
T1OSC
Clock Source Option
for other Modules
WDT, PWRT, FSCM
and Two-Speed Start-up
Control
Clock
OSCCON<1:0>
DS39689E-page 29
Peripherals
IDLEN
CPU