ATMEGA8515-16JU Atmel, ATMEGA8515-16JU Datasheet - Page 195
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ATMEGA8515-16JU
Manufacturer Part Number
ATMEGA8515-16JU
Description
IC MCU AVR 8K 16MHZ IND 44-PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515-16JU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
35
Interface Type
SPI/USART
Number Of Timers
2
Processor Series
ATMEGA8x
Core
AVR8
Data Ram Size
512 B
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
512Byte
# I/os (max)
35
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Data Polling EEPROM
2512K–AVR–01/10
When a new byte has been written and is being programmed into EEPROM, reading the
address location being programmed will give the value $FF. At the time the device is
ready for a new byte, the programmed value will read correctly. This is used to deter-
mine when the next byte can be written. This will not work for the value $FF, but the user
should have the following in mind: As a chip erased device contains $FF in all locations,
programming of addresses that are meant to contain $FF, can be skipped. This does
not apply if the EEPROM is reprogrammed without chip-erasing the device. In this case,
data polling cannot be used for the value $FF, and the user will have to wait at least
t
Table 93. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Figure 85. Serial Programming Waveforms
WD_EEPROM
Symbol
t
t
t
t
SERIAL DATA OUTPUT
WD_FUSE
WD_FLASH
WD_EEPROM
WD_ERASE
SERIAL CLOCK INPUT
SERIAL DATA INPUT
before programming the next byte. See Table 93 for t
SAMPLE
(MOSI)
(MISO)
(SCK)
MSB
MSB
Minimum Wait Delay
4.5 ms
4.5 ms
9.0 ms
9.0 ms
ATmega8515(L)
WD_EEPROM
value.
LSB
LSB
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