PIC24FJ32GA102-I/SO Microchip Technology, PIC24FJ32GA102-I/SO Datasheet - Page 108
![IC MCU 16BIT 32KB FLASH 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC24FJ32GA102-I/SO
Manufacturer Part Number
PIC24FJ32GA102-I/SO
Description
IC MCU 16BIT 32KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(308 pages)
2.PIC24FJ32GA102-ISP.pdf
(12 pages)
3.PIC24FJ32GA102-ISP.pdf
(48 pages)
4.PIC24FJ64GA104-IML.pdf
(300 pages)
Specifications of PIC24FJ32GA102-I/SO
Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240020, DM240002, DM240011, DV164033
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GA102-ISP PDF datasheet #3
- PIC24FJ64GA104-IML PDF datasheet #4
- Current page: 108 of 308
- Download datasheet (3Mb)
module requiring the SOSC (such as RTCC, Timer1 or
PIC24FJ64GA104 FAMILY
8.5
8.5.1
PIC24FJ64GA104 family devices do not have to set the
SOSCEN bit to use the Secondary Oscillator. Any
DSWDT) will automatically turn on the SOSC when the
clock signal is needed. The SOSC, however, has a long
start-up time. To avoid delays for peripheral start-up, the
SOSC can be manually started using the SOSCEN bit.
To use the Secondary Oscillator, the SOSCSEL<1:0>
bits (CW3<9:8>) must be configured in an oscillator
mode – either ‘11’ or ‘01’. Setting SOSCSEL to ‘00’
configures the SOSC pins for Digital mode, enabling
digital I/O functionality on the pins. Digital functionality
will not be available if the SOSC is configured in either
of the oscillator modes.
8.5.2
The Secondary Oscillator can operate in two distinct
levels of power consumption based on device configu-
ration. In Low-Power mode, the oscillator operates in a
low drive strength, low-power state. By default, the
oscillator uses a higher drive strength, and therefore,
requires more power. The Secondary Oscillator Mode
Configuration
determine the oscillator’s power mode. Programming
the SOSCSEL bits to ‘01’ selects low-power operation.
The lower drive strength of this mode makes the SOSC
more sensitive to noise and requires a longer start-up
time. When Low-Power mode is used, care must be
taken in the design and layout of the SOSC circuit to
ensure that the oscillator starts up and oscillates
properly.
8.5.3
The SOSC can also be configured to run from an
external 32 kHz clock source, rather than the internal
oscillator. In this mode, also referred to as Digital mode,
the clock source provided on the SCLKI pin is used to
clock any modules that are configured to use the
Secondary Oscillator. In this mode, the crystal driving
circuit is disabled and the SOSCEN bit (OSCCON<1>)
has no effect.
8.5.4
The pinout limitations on low pin count devices, such as
those in the PIC24FJ64GA104 family, may make the
SOSC more susceptible to noise than other PIC24F
devices. Unless proper care is taken in the design and
layout of the SOSC circuit, this external noise may
introduce inaccuracies into the oscillator’s period.
DS39951C-page 108
Secondary Oscillator (SOSC)
BASIC SOSC OPERATION
LOW-POWER SOSC OPERATION
EXTERNAL (DIGITAL) CLOCK
MODE (SCLKI)
SOSC LAYOUT CONSIDERATIONS
bits,
SOSCSEL<1:0>
(CW3<9:8>),
In general, the crystal circuit connections should be as
short as possible. It is also good practice to surround
the crystal circuit with a ground loop or ground plane.
For more information on crystal circuit design, please
refer to Section 6 “Oscillator” (DS39700) of the
“PIC24F Family Reference Manual”. Additional infor-
mation is also available in these Microchip Application
Notes:
• AN826, “Crystal Oscillator Basics and Crystal
• AN849, “Basic PICmicro
8.6
In addition to the CLKO output (F
certain oscillator modes, the device clock in the
PIC24FJ64GA104 family devices can also be config-
ured to provide a reference clock output signal to a port
pin. This feature is available in all oscillator configura-
tions and allows the user to select a greater range of
clock submultiples to drive external devices in the
application.
This reference clock output is controlled by the
REFOCON register (Register 8-4). Setting the ROEN
bit (REFOCON<15>) makes the clock signal available
on the REFO pin. The RODIV bits (REFOCON<11:8>)
enable the selection of 16 different clock divider
options.
The ROSSLP and ROSEL bits (REFOCON<13:12>)
control the availability of the reference output during
Sleep mode. The ROSEL bit determines if the oscillator
on OSC1 and OSC2, or the current system clock source,
is used for the reference clock output. The ROSSLP bit
determines if the reference source is available on REFO
when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for one of the primary
modes (EC, HS or XT); otherwise, if the POSCEN bit is
not also set, the oscillator on OSC1 and OSC2 will be
powered down when the device enters Sleep mode.
Clearing the ROSEL bit allows the reference output
frequency to change as the system clock changes
during any clock switches.
Selection for rfPIC
(DS00826)
(DS00849).
Reference Clock Output
®
and PICmicro
2010 Microchip Technology Inc.
®
Oscillator Design”
OSC
®
Devices”
/2) available in
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