PIC24FJ32GA102-I/SO Microchip Technology, PIC24FJ32GA102-I/SO Datasheet - Page 166
![IC MCU 16BIT 32KB FLASH 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC24FJ32GA102-I/SO
Manufacturer Part Number
PIC24FJ32GA102-I/SO
Description
IC MCU 16BIT 32KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(308 pages)
2.PIC24FJ32GA102-ISP.pdf
(12 pages)
3.PIC24FJ32GA102-ISP.pdf
(48 pages)
4.PIC24FJ64GA104-IML.pdf
(300 pages)
Specifications of PIC24FJ32GA102-I/SO
Program Memory Type
FLASH
Program Memory Size
32KB (11K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240020, DM240002, DM240011, DV164033
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GA102-ISP PDF datasheet #3
- PIC24FJ64GA104-IML PDF datasheet #4
- Current page: 166 of 308
- Download datasheet (3Mb)
PIC24FJ64GA104 FAMILY
To set up the SPI module for the Standard Master mode
of operation:
1.
2.
3.
4.
5.
FIGURE 15-1:
DS39951C-page 166
SSx/FSYNCx
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON1
and
(SPIxCON1<5>) = 1.
Clear the SPIROV bit (SPIxSTAT<6>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Write the data to be transmitted to the SPIxBUF
register. Transmission (and reception) will start
as soon as data is written to the SPIxBUF
register.
SDOx
SCKx
SDIx
Clear the SPIxIF bit in the respective IFS
register.
Set the SPIxIE bit in the respective IEC
register.
Write the SPIxIP bits in the respective IPC
register to set the interrupt priority.
SPIxCON2
Read SPIxBUF
Control
Sync
Transfer
SPIx MODULE BLOCK DIAGRAM (STANDARD MODE)
registers
bit 0
SPIxBUF
SPIxSR
Control
with
Clock
Shift Control
MSTEN
Transfer
Write SPIxBUF
Select
Edge
To set up the SPI module for the Standard Slave mode
of operation:
1.
2.
3.
4.
5.
6.
7.
16
Clear the SPIxBUF register.
If using interrupts:
a)
b)
c)
Write the desired settings to the SPIxCON1
and
(SPIxCON1<5>) = 0.
Clear the SMP bit.
If the CKE bit (SPIxCON1<8>) is set, then the
SSEN bit (SPIxCON1<7>) must be set to enable
the SSx pin.
Clear the SPIROV bit (SPIxSTAT<6>).
Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
Secondary
Prescaler
1:1 to 1:8
Clear the SPIxIF bit in the respective IFS
register.
Set the SPIxIE bit in the respective IEC
register.
Write the SPIxIP bits in the respective IPC
register to set the interrupt priority.
Internal Data Bus
SPIxCON2
1:1/4/16/64
2010 Microchip Technology Inc.
Prescaler
Primary
registers
SPIxCON1<1:0>
SPIxCON1<4:2>
Enable
Master Clock
with
F
CY
MSTEN
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