PIC18F4510-E/ML Microchip Technology, PIC18F4510-E/ML Datasheet - Page 111
![IC MCU FLASH 16KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4510-E/ML
Manufacturer Part Number
PIC18F4510-E/ML
Description
IC MCU FLASH 16KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18LF2410-ISO.pdf
(376 pages)
4.PIC18LF2410-ISO.pdf
(8 pages)
5.PIC18LF2410-ISO.pdf
(16 pages)
6.PIC18LF2410-ISO.pdf
(6 pages)
7.PIC18LF2410-ISO.pdf
(6 pages)
8.PIC18LF2410-ISO.pdf
(8 pages)
Specifications of PIC18F4510-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
For Use With
I3DB18F4620 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18LF2410-ISO PDF datasheet #3
- PIC18LF2410-ISO PDF datasheet #4
- PIC18LF2410-ISO PDF datasheet #5
- PIC18LF2410-ISO PDF datasheet #6
- PIC18LF2410-ISO PDF datasheet #7
- PIC18LF2410-ISO PDF datasheet #8
- Current page: 111 of 376
- Download datasheet (7Mb)
FIGURE 9-3:
FIGURE 9-4:
TABLE 9-11:
© 2009 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTE
LATE
TRISE
INTCON
PIR1
PIE1
IPR1
ADCON1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Note 1:
Name
PORTD<7:0>
PORTD<7:0>
PSPIF
These bits are unimplemented on 28-pin devices and read as ‘0’.
PSPIF
PORTD Data Latch Register (Read and Write to Data Latch)
PORTD Data Direction Control Register
GIE/GIEH PEIE/GIEL
OBF
OBF
PSPIF
PSPIE
PSPIP
CS
WR
RD
IBF
CS
WR
RD
IBF
Bit 7
RD7
IBF
—
—
—
REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
(1)
(1)
(1)
PARALLEL SLAVE PORT WRITE WAVEFORMS
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
Q1
ADIF
ADIE
ADIP
Bit 6
RD6
OBF
—
—
—
Q2
Q2
TMR0IF
VCFG1
IBOV
RCIE
RCIP
RCIF
Bit 5
RD5
Q3
Q3
—
—
Q4
Q4
PSPMODE
VCFG0
INT0IE
TXIE
TXIP
Bit 4
TXIF
RD4
—
—
Q1
Q1
PCFG3
Q2
SSPIF
SSPIE
SSPIP
Q2
RBIE
Bit 3
RD3
RE3
—
—
PIC18F2X1X/4X1X
Q3
Q3
LATE Data Output bits
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISE2
PCFG2
Bit 2
RD2
RE2
Q4
Q4
TMR2IE
TMR2IP
TMR2IF
TRISE1
PCFG1
Q1
INT0IF
Q1
Bit 1
RD1
RE1
Q2
Q2
TMR1IF
TMR1IE
TMR1IP
TRISE0
PCFG0
RBIF
DS39636D-page 113
Bit 0
RD0
RE0
Q3
Q3
on page
Values
Q4
Reset
Q4
54
54
54
54
54
54
51
53
54
54
54
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