ATMEGA329V-8MUR Atmel, ATMEGA329V-8MUR Datasheet - Page 282
ATMEGA329V-8MUR
Manufacturer Part Number
ATMEGA329V-8MUR
Description
MCU AVR 32K FLASH 8MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA329-16AU.pdf
(392 pages)
Specifications of ATMEGA329V-8MUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Entering the Boot Loader Program
ATmega329/3290/649/6490
Table 26-2.
Note:
Table 26-3.
Note:
Entering the Boot Loader takes place by a jump or call from the application program. This may
be initiated by a trigger such as a command received via USART, or SPI interface. Alternatively,
the Boot Reset Fuse can be programmed so that the Reset Vector is pointing to the Boot Flash
start address after a reset. In this case, the Boot Loader is started after a reset. After the applica-
tion code is loaded, the program can start executing the application code. Note that the fuses
cannot be changed by the MCU itself. This means that once the Boot Reset Fuse is pro-
grammed, the Reset Vector will always point to the Boot Loader Reset and the fuse can only be
changed through the serial or parallel programming interface.
Table 26-4.
Note:
BLB0
Mode
BLB1
Mode
BOOTRST
1
2
3
4
1
2
3
4
1
0
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
BLB02
BLB12
1
1
0
0
1
1
0
0
Boot Lock Bit0 Protection Modes (Application Section)
Boot Lock Bit1 Protection Modes (Boot Loader Section)
Boot Reset Fuse
Reset Address
Reset Vector = Application Reset (address 0x0000)
Reset Vector = Boot Loader Reset (see
BLB01
BLB11
1
0
0
1
1
0
0
1
Protection
No restrictions for SPM or LPM accessing the Application section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and LPM executing
from the Boot Loader section is not allowed to read from the Application
section. If Interrupt Vectors are placed in the Boot Loader section,
interrupts are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not allowed to read from
the Application section. If Interrupt Vectors are placed in the Boot Loader
section, interrupts are disabled while executing from the Application
section.
Protection
No restrictions for SPM or LPM accessing the Boot Loader section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read from the
Boot Loader section. If Interrupt Vectors are placed in the Application
section, interrupts are disabled while executing from the Boot Loader
section.
LPM executing from the Application section is not allowed to read from
the Boot Loader section. If Interrupt Vectors are placed in the Application
section, interrupts are disabled while executing from the Boot Loader
section.
(1)
Table 26-6 on page
(1)
(1)
290)
2552K–AVR–04/11
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