PIC18F27J13-I/ML Microchip Technology, PIC18F27J13-I/ML Datasheet - Page 157

IC PIC MCU 128KB FLASH 28QFN

PIC18F27J13-I/ML

Manufacturer Part Number
PIC18F27J13-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/ML

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F27J13-I/ML
Manufacturer:
MICROCHIP
Quantity:
4 000
TABLE 10-11: PORTE I/O SUMMARY
TABLE 10-12: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
 2010 Microchip Technology Inc.
PORTE
LATE
TRISE
ANCON0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTE.
Note 1:
RE0/AN5/
PMRD
RE1/AN6/
PMWR
RE2/AN7/
PMCS
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note:
Name
(1)
Pin
(1)
(1)
These registers and/or bits are not available in 28-pin devices (PIC18F26J13, PIC18F27J13,
PIC18LF26J13 and PIC18LF26J13).
I = Input; O = Output; P = Power
bit 7 RDPU: PORTD Pull-up Enable bit
0 = All PORTD pull-ups are disabled
1 = PORTD pull-ups are enabled for any input pad
bit 6 REPU: PORTE Pull-up Enable bit
0 = All PORTE pull-ups are disabled
1 = PORTE pull-ups are enabled for any input pad
PCFG7
RDPU
Bit 7
Function
PMWR
PMRD
PMCS
RE0
AN5
RE1
AN6
RE2
AN7
(1)
PCFG6
Setting
REPU
Bit 6
TRIS
1
0
1
1
0
1
0
1
1
0
1
0
1
0
(1)
I/O
O
O
O
O
O
O
PCFG5
I
I
I
I
I
I
I
I
Bit 5
ST/TTL Parallel Master Port (io_rd_in).
ST/TTL Parallel Master Port (io_wr_in).
Type
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
(1)
Preliminary
PORTE<0> data input; disabled when analog input is enabled.
LATE<0> data output; not affected by analog input.
A/D Input Channel 5; default input configuration on POR.
Parallel Master Port read strobe.
PORTE<1> data input; disabled when analog input is enabled.
LATE<1> data output; not affected by analog input.
A/D Input Channel 6; default input configuration on POR.
Parallel Master Port write strobe.
PORTE<2> data input; disabled when analog input is enabled.
LATE<2> data output; not affected by an analog input.
A/D Input Channel 7; default input configuration on POR.
Parallel Master Port byte enable.
PCFG4
Bit 4
PIC18F47J13 FAMILY
PCFG3
Bit 3
Description
TRISE2
PCFG2
LATE2
Bit 2
RE2
TRISE1
PCFG1
LATE1
Bit 1
RE1
DS39974A-page 157
TRISE0
PCFG0
LATE0
Bit 0
RE0

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