ATMEGA645P-AU Atmel, ATMEGA645P-AU Datasheet - Page 8
![IC MCU AVR 64K FLASH 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA645P-AU
Manufacturer Part Number
ATMEGA645P-AU
Description
IC MCU AVR 64K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA645P-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
2.3.10
2.3.11
2.3.12
2.3.13
2.3.14
2.3.15
2.3.16
8285BS–AVR–03/11
Port H (PH7:PH0)
Port J (PJ6:PJ0)
RESET
XTAL1
XTAL2
AVCC
AREF
ATmega165A/165PA/325A/325PA/3250A/3250PA/6
Port G also serves the functions of various special features of the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on
84.
Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port H output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port H pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port H pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
P o r t H a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega3250A/3250PA/6450A/6450P as listed on
Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port J output buffers have symmetrical drive characteristics with both high sink and source capa-
bility. As inputs, Port J pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port J pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
P o r t J a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega3250A/3250PA/6450A/6450P as listed on
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
328. Shorter pulses are not guaranteed to generate a reset.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-
nected to V
through a low-pass filter.
This is the analog reference pin for the A/D Converter.
CC
, even if the ADC is not used. If the ADC is used, it should be connected to V
page
page
85.
87.
Table 27-13 on page
page
CC
8