ATMEGA649A-MUR Atmel, ATMEGA649A-MUR Datasheet - Page 9

• Manufacturer Part Number: ATMEGA649A-MUR
• Description: IC MCU AVR 64K FLASH 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649A-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.3.7
2.3.8
2.3.9
2.3.10
2.3.11
8284AS–AVR–10/10
Port E (PE7...PE0)
Port F (PF7...PF0)
Port G (PG5...PG0)
Port H (PH7...PH0)
Port J (PJ6...PJ0)
Port D also serves the functions of various special features of the
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on
79.
Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port E output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port E pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port E also serves the functions of various special features of the
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on
81.
Port F serves as the analog inputs to the A/D Converter.
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins
can provide internal pull-up resistors (selected for each bit). The Port F output buffers have sym-
metrical drive characteristics with both high sink and source capability. As inputs, Port F pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port F
pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the
JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will
be activated even if a reset occurs.
Port F also serves the functions of the JTAG interface.
Port G is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port G output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port G pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port G pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port G also serves the functions of various special features of the
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P as listed on
85.
Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port H output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port H pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port H pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port H also serves the functions of various special features of the ATmega3290PA/6490P as
listed on
Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port J output buffers have symmetrical drive characteristics with both high sink and source capa-
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
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87.
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