PIC18LF27J53-I/ML Microchip Technology, PIC18LF27J53-I/ML Datasheet - Page 357
PIC18LF27J53-I/ML
Manufacturer Part Number
PIC18LF27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18LF27J53-I/ML
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 3.6V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF27J53-I/ML
Manufacturer:
ATMEL
Quantity:
101
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 357 of 496
- Download datasheet (5Mb)
REGISTER 24-9:
REGISTER 24-10: CONFIG7L: CONFIGURATION REGISTER 7 LOW
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5
bit 4-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
WRTD
R/C-1
U-0
—
This bit is read-only in normal execution mode; it can be written only in Program mode.
Available on PIC18(L)FX5K22 and PIC18(L)FX6K22 devices.
WRTD: Data EEPROM Write Protection bit
1 = Data EEPROM not write-protected
0 = Data EEPROM write-protected
WRTB: Boot Block Write Protection bit
1 = Boot Block not write-protected
0 = Boot Block write-protected
WRTC: Configuration Register Write Protection bit
1 = Configuration registers not write-protected
0 = Configuration registers write-protected
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
EBTR3: Table Read Protection bit
1 = Block 3 not protected from table reads executed in other blocks
0 = Block 3 protected from table reads executed in other blocks
EBTR2: Table Read Protection bit
1 = Block 2 not protected from table reads executed in other blocks
0 = Block 2 protected from table reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 not protected from table reads executed in other blocks
0 = Block 1 protected from table reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 not protected from table reads executed in other blocks
0 = Block 0 protected from table reads executed in other blocks
WRTB
R/C-1
U-0
—
CONFIG6H: CONFIGURATION REGISTER 6 HIGH
WRTC
R-1
U-0
—
(1)
U-0
U-0
(1)
(1)
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
EBTR3
R/C-1
U-0
—
PIC18(L)F2X/4XK22
(1)
(1)
EBTR2
R/C-1
U-0
—
(1)
EBTR1
R/C-1
U-0
—
DS41412D-page 357
EBTR0
R/C-1
U-0
—
bit 0
bit 0
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