ATMEGA649P-MUR Atmel, ATMEGA649P-MUR Datasheet - Page 10
![AVR, 64KB FLASH, 2KB EE, 4KB SRA](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA649P-MUR
Manufacturer Part Number
ATMEGA649P-MUR
Description
AVR, 64KB FLASH, 2KB EE, 4KB SRA
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA649P-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.3.12
2.3.13
2.3.14
2.3.15
2.3.16
2.3.17
10
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
RESET
XTAL1
XTAL2
AVCC
AREF
LCDCAP
bility. As inputs, Port J pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port J pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port J also serves the functions of various special features of the ATmega3290PA/6490P as
listed on
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
Characteristics” on page
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-
nected to V
through a low-pass filter.
This is the analog reference pin for the A/D Converter.
An external capacitor (typical > 470 nF) must be connected to the LCDCAP pin as shown in
ure
as a reservoir for LCD power (V
the time until V
23-2, if the LCD module is enabled and configured to use internal power. This capacitor acts
page
CC
, even if the ADC is not used. If the ADC is used, it should be connected to V
90.
LCD
reaches its target value.
354. Shorter pulses are not guaranteed to generate a reset.
LCD
). A large capacitance reduces ripple on V
”System and Reset
LCD
8284AS–AVR–10/10
but increases
Fig-
CC