DSPIC33FJ64GP204-I/PT Microchip Technology, DSPIC33FJ64GP204-I/PT Datasheet - Page 146

IC DSPIC MCU/DSP 64K 44-TQFP

DSPIC33FJ64GP204-I/PT

Manufacturer Part Number
DSPIC33FJ64GP204-I/PT
Description
IC DSPIC MCU/DSP 64K 44-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP204-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Core Frequency
40MHz
Embedded Interface Type
ECAN, I2C, SPI, UART
No. Of I/o's
35
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ64GP204-I/PT
Manufacturer:
ST
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101
Part Number:
DSPIC33FJ64GP204-I/PT
Manufacturer:
MICROCHIP
Quantity:
390
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DSPIC33FJ64GP204-I/PT
Manufacturer:
Microchip Technology
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 9-1:
DS70292E-page 146
bit 3
bit 2
bit 1
bit 0
Note 1:
2:
3:
Writes to this register require an unlock sequence. Refer to Section 39. “Oscillator (Part III)” (DS70216)
in the “dsPIC33F/PIC24H Family Reference Manual” (available from the Microchip website) for details.
Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
This applies to clock switches in either direction. In these instances, the application must switch to FRC
mode as a transition clock source between the two PLL modes.
This register is reset only on a Power-on Reset (POR).
CF: Clock Fail Detect bit (read/clear by application)
1 = FSCM has detected clock failure
0 = FSCM has not detected clock failure
Unimplemented: Read as ‘0’
LPOSCEN: Secondary (LP) Oscillator Enable bit
1 = Enable secondary oscillator
0 = Disable secondary oscillator
OSWEN: Oscillator Switch Enable bit
1 = Request oscillator switch to selection specified by NOSC<2:0> bits
0 = Oscillator switch is complete
OSCCON: OSCILLATOR CONTROL REGISTER
(1,3)
(CONTINUED)
© 2011 Microchip Technology Inc.

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