PIC16F77-E/PT Microchip Technology, PIC16F77-E/PT Datasheet - Page 115
PIC16F77-E/PT
Manufacturer Part Number
PIC16F77-E/PT
Description
IC MCU FLASH 8KX14 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16F77E/PT
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 115 of 688
- Download datasheet (3Mb)
7.2
1997 Microchip Technology Inc.
Control Register
bit 7:5
bit 4
bit 3
bit 2
bit 1
bit 0
Register 7-1: EECON1 Register
bit 7
Unimplemented: Read as '0'
EEIF: EEPROM Write Operation Interrupt Flag bit
1 = The write operation completed (must be cleared in software)
0 = The write operation is not complete or has not been started
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the data EEPROM
WR: Write Control bit
1 = initiates a write cycle. The bit is cleared by hardware once write is complete.
0 = Write cycle to the data EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read. Read takes one cycle. RD is cleared in hardware.
0 = Does not initiate an EEPROM read
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
Note 1: Future devices will have this bit in the PIR register.
U-0
The WR bit can only be set (not cleared) in software.
The RD bit can only be set (not cleared) in software.
(any MCLR reset or any WDT reset during normal operation)
—
U-0
—
W = Writable bit
U-0
Section 7. Data EEPROM
—
EEIF
R/W-1
(1)
S = Settable bit
- n = Value at POR reset
WRERR
R/W-1
WREN
R/W-x
R/S-0
WR
DS31007A-page 7-3
bit 0
R/S-x
RD
7
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