PIC16F77-E/PT Microchip Technology, PIC16F77-E/PT Datasheet - Page 397
![IC MCU FLASH 8KX14 A/D 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC16F77-E/PT
Manufacturer Part Number
PIC16F77-E/PT
Description
IC MCU FLASH 8KX14 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F77-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16F77E/PT
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 397 of 688
- Download datasheet (3Mb)
21.9
21.10
1997 Microchip Technology Inc.
A/D Accuracy/Error
Effects of a RESET
In systems where the device frequency is low, use of the A/D RC clock is preferred. At moderate
to high frequencies, T
The absolute accuracy specified for the A/D converter includes the sum of all contributions for
quantization error, integral error, differential error, full scale error, offset error, and monotonicity.
It is defined as the maximum deviation from an actual transition versus an ideal transition for any
code. The absolute error of the A/D converter is specified at < 1 LSb for V
device’s specified operating range). However, the accuracy of the A/D converter will degrade as
V
For a given range of analog inputs, the output digital code will be the same. This is due to the
quantization of the analog input to a digital code. Quantization error is typically
inherent in the analog to digital conversion process. The only way to reduce quantization error is
to increase the resolution of the A/D converter.
Offset error measures the first actual transition of a code versus the first ideal transition of a code.
Offset error shifts the entire transfer function. Offset error can be calibrated out of a system or
introduced into a system through the interaction of the total leakage current and source imped-
ance at the analog input.
Gain error measures the maximum deviation of the last actual transition and the last ideal tran-
sition adjusted for offset error. This error appears as a change in slope of the transfer function.
The difference in gain error to full scale error is that full scale does not take offset error into
account. Gain error can be calibrated out in software.
Linearity error refers to the uniformity of the code changes. Linearity errors cannot be calibrated
out of the system. Integral non-linearity error measures the actual code transition versus the ideal
code transition adjusted by the gain error for each code.
Differential non-linearity measures the maximum actual code width versus the ideal code width.
This measure is unadjusted.
The maximum pin leakage current is specified in the Device Data Sheet electrical specification
parameter
In systems where the device frequency is low, use of the A/D RC clock is preferred. At moderate
to high frequencies, T
minimum and should be minimized to reduce inaccuracies due to noise and sampling capacitor
bleed off.
In systems where the device will enter SLEEP mode after the start of the A/D conversion, the RC
clock source selection is required. In this mode, the digital noise from the modules in SLEEP are
stopped. This method gives high accuracy.
A device reset forces all registers to their reset state. This forces the A/D module to be turned off,
and any conversion is aborted. The value that is in the ADRES register is not modified for a
Power-on Reset. The ADRES register will contain unknown data after a Power-on Reset.
DD
diverges from V
D060.
Section 21. 8-bit A/D Converter
REF
AD
AD
.
should be derived from the device oscillator.
should be derived from the device oscillator. T
AD
DS31021A-page 21-13
DD
must not violate the
= V
1/2 LSb and is
REF
(over the
21
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