ATMEGA32U4-MU Atmel, ATMEGA32U4-MU Datasheet - Page 283
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATMEGA32U4-MU
Manufacturer Part Number
ATMEGA32U4-MU
Description
MCU AVR 32K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U4-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
EBI/I2S/SPI/TWI/USART/USB
On-chip Adc
12-chx10-bit
Number Of Timers
5
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA32U4-16MU
ATMEGA32U4-16MU
ATMEGA32U4-16MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
- Current page: 283 of 433
- Download datasheet (9Mb)
7766F–AVR–11/10
00b: Control10b: Bulk
01b: Isochronous11b: Interrupt
• 5-1 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 0 - EPDIR - Endpoint Direction Bit
Set to configure an IN direction for bulk, interrupt or isochronous endpoints.
Clear to configure an OUT direction for bulk, interrupt, isochronous or control endpoints.
• 7 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 6-4 - EPSIZE2:0 - Endpoint Size Bits
Set this bit according to the endpoint size:
000b: 8 bytes100b: 128 bytes
001b: 16 bytes101b: 256 bytes
010b: 32 bytes110b: 512 bytes
011b: 64 bytes111b: Reserved. Do not use this configuration.
• 3-2 - EPBK1:0 - Endpoint Bank Bits
Set this field according to the endpoint size:
00b: One bank
01b: Double bank
1xb: Reserved. Do not use this configuration.
• 1 - ALLOC - Endpoint Allocation Bit
Set this bit to allocate the endpoint memory.
Clear to free the endpoint memory.
See Section 22.6, page 267 for more details.
• 0 - Reserved
The value read from these bits is always 0. Do not set these bits.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CFGOK
R
7
0
R
7
0
-
OVERFI
R/W
R/W
6
0
6
0
EPSIZE2:0
UNDERFI
R/W
R/W
5
0
5
0
R/W
R/W
4
0
4
0
-
R/W
3
0
R
3
0
EPBK1:0
DTSEQ1:0
R/W
ATmega16/32U4
2
0
R
2
0
ALLOC
R/W
NBUSYBK1:0
1
0
R
1
0
R
R
0
0
0
0
-
UECFG1X
UESTA0X
283
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