AT89C51RC2-SLSUM Atmel, AT89C51RC2-SLSUM Datasheet - Page 48

IC 8051 MCU FLASH 32K 44PLCC

AT89C51RC2-SLSUM

Manufacturer Part Number
AT89C51RC2-SLSUM
Description
IC 8051 MCU FLASH 32K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RC2-SLSUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
60MHz
Interface Type
SPI/UART
Total Internal Ram Size
1.25KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1280 B
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

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Internal Baud Rate Generator
(BRG)
Figure 21. Internal Baud Rate
48
AT89C51RB2/RC2
Table 32. Baud Rate Selection Table UART
When the internal Baud Rate Generator is used, the Baud Rates are determined by the
BRG overflow depending on the BRL reload value, the value of SPD bit (Speed Mode)
in BDRCON register and the value of the SMOD1 bit in PCON register.
Baud_Rate =
F
BRL = 256 -
Clk Periph
(T2CON)
The baud rate for UART is token by formula:
TCLK
0
1
0
1
X
X
0
1
X
6
6
(1-SPD)
(1-SPD)
÷ 6
2
2
(T2CON)
SMOD1
SMOD1
⋅ 32 ⋅ Baud_Rate
⋅ 32 ⋅ (256 -BRL)
RCLK
BDRCON.1
X
X
X
0
0
1
1
0
1
SPD
⋅ F
⋅ F
0
1
PER
PER
BDRCON.4
(BDRCON)
BRR
TBCK
0
0
0
0
1
1
0
0
1
(8 bits)
(8 bits)
BRG
BRL
(BDRCON)
RBCK
0
0
0
0
0
0
1
1
1
Overflow
Clock Source
UART Tx
INT_BRG
INT_BRG
INT_BRG
÷ 2
Timer 1
Timer 2
Timer 1
Timer 2
Timer 1
Timer 2
SMOD1
PCON.7
0
1
4180E–8051–10/06
Clock Source
UART Rx
INT_BRG
INT_BRG
INT_BRG
Timer 1
Timer 1
Timer 2
Timer 2
Timer 1
Timer 2
INT_BRG

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