ATMEGA6450A-AU Atmel, ATMEGA6450A-AU Datasheet - Page 30
![IC MCU AVR 64K FLASH 100TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA6450A-AU
Manufacturer Part Number
ATMEGA6450A-AU
Description
IC MCU AVR 64K FLASH 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA6450A-AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Processor Series
ATmega
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
69
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
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Price
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8.1.4
8.1.5
8.2
30
Clock Sources
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Asynchronous Timer Clock – clk
ADC Clock – clk
The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly
from an external clock or an external 32kHz clock crystal. The dedicated clock domain allows
using this Timer/Counter as a real-time counter even when the device is in sleep mode.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion
results.
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the AVR clock generator, and routed to the
appropriate modules.
Table 8-1.
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts
from reset, there is an additional delay allowing the power to reach a stable level before com-
mencing normal operation. The Watchdog Oscillator is used for timing this real-time part of the
start-up time. The number of WDT Oscillator cycles used for each time-out is shown in
2. The frequency of the Watchdog Oscillator is voltage dependent as shown in
teristics” on page
Table 8-2.
ADC
Device Clocking Option
External Crystal/Ceramic Resonator
External Low-frequency Crystal
Calibrated Internal RC Oscillator
External Clock
Reserved
Typ Time-out (V
1. For all fuses “1” means unprogrammed while “0” means programmed.
4.1ms
65ms
Device Clocking Options Select
Number of Watchdog Oscillator Cycles
332.
ASY
CC
= 5.0V)
Typ Time-out (V
(1)
4.3ms
69ms
CC
= 3.0V)
0011, 0001, 0101, 0100
Number of Cycles
64K (65,536)
4K (4,096)
1111 - 1000
0111 - 0110
CKSEL3:0
”Typical Charac-
0010
0000
8285B–AVR–03/11
Table 8-
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